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lionrouge
Adventurer
Adventurer
2,604 Views
Registered: ‎01-27-2014

How to swap XAUI lanes in FPGA?

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Hi !
I use Kintex-7  XC7K410TFFG900 bank117 for XAUI.
In my PCB i have XAUI lanes connected like this:
lane 0 -> X0Y10

lane 1 -> X0Y8

lane 2 -> X0Y11

lane 3 -> X0Y9

 

As i understand XAUI core demands them to be like this to work properly:

lane 0 -> X0Y8

lane 1 -> X0Y9

lane 2 -> X0Y10

lane 3 -> X0Y11

 

How can i fix it in Verilog?

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lionrouge
Adventurer
Adventurer
4,127 Views
Registered: ‎01-27-2014

I think i found a better way in PG053, p.92. I just changed corresponding GTXE2 numbers. Don't know if it works yet as i found another issue with my PCB.

 

set_property LOC GTXE2_CHANNEL_X1Y8 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt0_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y9 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt1_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y10 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt2_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y11 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt3_<CompName>_gt_wrapper_i/gtxe2_i}]

 

 

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yenigal
Xilinx Employee
Xilinx Employee
2,460 Views
Registered: ‎02-06-2013

Hi

 

You can map the transceiver parallel data correctly in the block file before going to the core as a workaround.

Regards,

Satish

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lionrouge
Adventurer
Adventurer
4,128 Views
Registered: ‎01-27-2014

I think i found a better way in PG053, p.92. I just changed corresponding GTXE2 numbers. Don't know if it works yet as i found another issue with my PCB.

 

set_property LOC GTXE2_CHANNEL_X1Y8 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt0_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y9 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt1_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y10 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt2_<CompName>_gt_wrapper_i/gtxe2_i}]
set_property LOC GTXE2_CHANNEL_X1Y11 [get_cells -hierarchical -filter {NAME =~ */
gt_wrapper_i/gt3_<CompName>_gt_wrapper_i/gtxe2_i}]

 

 

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