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Observer
Observer
1,035 Views
Registered: ‎11-13-2017

JESD204 always reset state

I'm tried 'JESD204 Hardware Demo' in EVM(zc706) but it is not work

Reset register(0x004) is always '1'(reset state)

help me!

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4 Replies
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Adventurer
Adventurer
1,004 Views
Registered: ‎10-26-2017

Can you post a screenshot of your ILA waveforms in the Hardware Manager?

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Scholar
Scholar
996 Views
Registered: ‎02-27-2008

What state did you tie reset to?  Typically reset = 1 to reset, 0 to run.

 

resetn is 0 to reset, and 1 to run....

 

Check you have the correct logic for this reset signal in your design.

Austin Lesea
Principal Engineer
Xilinx San Jose
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Observer
Observer
982 Views
Registered: ‎11-13-2017

I do not reset

This is Xilinx Demo Program(ZC706)

i don't touch Demo code

 

 

 

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Moderator
Moderator
977 Views
Registered: ‎02-16-2010

Have you tried to apply reset ‘vio_reset’ pushbutton in VIO (or) Left SW7 pushbutton on the board?

Please post the snapshot of the VIO console when you are testing.
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