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kenneth--
Visitor
Visitor
5,829 Views
Registered: ‎03-01-2010

RocketIO RXDATA pins driven in unknown state

Hello,

 

I've been looking for the answer the whole day now and I am desperately asking for your help.

 

I'm using a custom protocol for the RocketIO transceivers and the data is being sent perfectly.

I connected the TXN and TNP pins directly to the RXN and RXP pins respectively and the FSM is in sync.

The problem is that RXBUFSTATUS remains undefined although I am driving the RXN and RXP pins.
The RXDATA pins are being forced in unkown state.

This is happening during simulation in modelsim SE.
Does anyone have any idea what the problem could be?

 

for clarity I uploaded a screenshot of my testbench and the troubling signals.

RXN and RXP look excatly the same as TXP and TXN 

 

Greets,

Kenneth 

rocketIO_Problem.jpg
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5 Replies
kka
Xilinx Employee
Xilinx Employee
5,812 Views
Registered: ‎12-02-2009

Can you be more specific on which transceiver you are using?

 

Virtex-5 GTP

Virtex-5 GTX

Virtex-6 GTX

Spartan-6 GTP

 

or any other?

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kenneth--
Visitor
Visitor
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Registered: ‎03-01-2010

I'm using Virtex-2 Pro RocketIO MGT's. More specifically the XUPV2P development board.
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kenneth--
Visitor
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Registered: ‎03-01-2010

I added my code as it probably helps alot to try to help me.

I still didn't find where my mistake is. Any idea's are welcome

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marting
Xilinx Employee
Xilinx Employee
5,766 Views
Registered: ‎08-06-2007

It doesn't look like this simulation is running much longer than 1us and may not be enough time for the simulated PLL and other analog portions to have locked up.  Try running your simulation out to ~100us.  That should be plenty of time.
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kenneth--
Visitor
Visitor
5,757 Views
Registered: ‎03-01-2010

I just ran the simulation for 100us and it still doesn't seem to be working. Rxcommadet is driven high while I'm sending the clock correction pattern, rxlossofsync is "00" after 490 ns, rxbufstatus is uninitialised and the rest of the receive signals are still driven to an unkown state. I'm guessing the analog portion of the transceiver is ready if rxlossofsync is in sync, if not, how can I know the transceiver is ready to realiably send and receive data?

Thanks for your time 

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