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rajuponnaganti
Voyager
Voyager
3,036 Views
Registered: ‎03-12-2015

Validating QSGMII IP

We have two KC705 boards.We want to test QSGMII before going using this IP.In datasheet, mentioned as in pic.Where can we find tested design files? How did you test this IP? what is the mode of operation?

 

Thanks in advance

waiting for response....

QSGMII_1.png
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3 Replies
yenigal
Xilinx Employee
Xilinx Employee
2,952 Views
Registered: ‎02-06-2013

Hi

 

The core was tested with internal design and in SMA/SFP loopback.

 

 You can just use the example design for basic link up and for data transmission you can integrate the TEMAC example designs to the 4 ports and test it.

Regards,

Satish

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rajuponnaganti
Voyager
Voyager
2,766 Views
Registered: ‎03-12-2015

With external PHY , it is not working.You should check with External PHY and share the design.It will be helpful for users.
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ponnagantiraju
Visitor
Visitor
2,253 Views
Registered: ‎07-06-2017

Ok the problem seems to be fixed.

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