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purtsjon
Observer
Observer
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Registered: ‎05-16-2018

Zynq MPSoC PS-GTR SGMII to SFP Copper 10/100/1000 Mbps auto negotiation

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We are successfully using Ethernet over a RJ45 SFP (Copper, Marvell PHY) on a Zynq MPSoC Board, with fixed 1 Gbps:

  • Zynq MPSoC  -->  PS-GTR  -->  SGMII  -->  Marvell PHY on SFP RJ45 Module
  • fixed-link 1000 Mbps, in Uboot device tree
  • No MDIO, PHY Register accessible through I2C
  • The PHY registers in the SFP are configured in uboot through I2C for fix 1Gbps

Now, we are working on: auto negotiation of 10/100/1000 Mbps in uboot!

My questions are:

1. We don´t have a MDIO interface between GEM and PHY. We control the PHY registers through I2C because of the SFP.
Am I correct, that the negotiated link speed must be read back (I2C) from the PHY and then configure the GEM accordingly? Without MDIO this must be done manually?

2. As SGMII is always running at 1 Gbps, the data are repeated 10 or 100 times depending on the link speed.
How does the GEM know which link speed is used? Can he detect it automatically from SGMII, does he read it through MDIO from the PHY? Or Is this the driver's job: check the PHY register and set the GEM register?

Thanks for your clarifications!
Jonas

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nanz
Moderator
Moderator
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Registered: ‎08-25-2009

Hi @purtsjon ,

In this case, it requires a manual updates as PHY is configured over I2C.


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shabbirk
Moderator
Moderator
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Registered: ‎12-04-2016

Hi Jonas

Please go through below answer record's that illustrates both the fixed link and uboot PS GTR SGMII usage:

https://www.xilinx.com/support/answers/72620.html

https://www.xilinx.com/support/answers/69769.html

 

Best Regards

Shabbir

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purtsjon
Observer
Observer
756 Views
Registered: ‎05-16-2018

Hi Shabbir

Thank you for your linked answer record's.

We already have a working fixed-link 1000 mbit connection over Copper.
From SGMII over SFP Copper to a link partner (Switch). So, our device-tree has the required:

- is-internal=pcspma
- fixed-link
- phy-mode = "sgmii"

But, when we enable auto-negotiation on the Copper RJ45 SFP (Marvell PHY), is the GEM driver capable of adjusting the link speed automatically, when there is no MDIO connected PHY available, and how?

Because the Marvell PHY on the SFP module is connected over I2C. And a PHY-entry in the device tree, like in AR#72620, is accessed through MDIO.
So, I wonder if the GEM can "detect" the link speed through SGMII or if he needs a manual update of the GEM Register "network_config": "gigabit_mode_enable" and "speed"?

 

 

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nanz
Moderator
Moderator
729 Views
Registered: ‎08-25-2009

Hi @purtsjon ,

In this case, it requires a manual updates as PHY is configured over I2C.


-------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs and our Versal Ethernet Sticky Note.

-------------------------------------------------------------------------------------------

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bitjockey
Adventurer
Adventurer
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Registered: ‎03-21-2011

Theoretically the MAC could count the number of 0x55 between start of frame delimiter and 0x5D and if it's =< 8 it's Gigabit, =< 80 it's 100bT and over that must be 10bT.  Depends on if the MAC you are using is clever enough for that.  Obviously that logic would run OUTSIDE any decimating clock enables that fire every 10/100 cycles to slow down the rest of the logic.

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purtsjon
Observer
Observer
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Registered: ‎05-16-2018

Thanks for your support.

In this case, I have to handle this manually for  the GEM.

Means, polling PHY negotiation status over I2C and set speed register in GEM accordingly.

Regards,

Jonas

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