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Visitor adspmoyle
Visitor
6,664 Views
Registered: ‎12-19-2014

Jtag for XC3S250E and FMC

I am trying to make 2 boards chaintogether on Jtag using the following boards:

 

1) actually a pair - ZC706  +  FMC-105-DEBUG card

2) Papilio one from Gadget factory

 

This is what seems ti be the problem> Pair (1) is using 3.3 vref for jtag and the Papilio is using 2.5

The Papilio One is a minimalistic Spartan3E 250. There is a place on the board to install a linear 6 pos header (4 jtag, vref, gnd) and I have remeoved the resitors to free any contention between the onboard FTDI 2232 (used as a programmer) and an external wiggler.

 

It is unclear to me what I need to do to convert the Papilio to 3.3 v comaptilibility for Jtag. Currently PROG_B is tied to 2.5. All VCCO's are tied to 3v3. (M0,M1,M2) are (1,0,1) (=JTAG).

 

1)How to make the C 3.3V compatible?

 

Crrently, when I hook to Jtag, Impact finds the ARM and XC7045 (ZYNC) but does not find the XC3SE, but, of course, when I do an ID test, it fails until I remove the XC3S250E from the chain and jumper the TDI/TDO together.

 

 

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2 Replies
Scholar austin
Scholar
6,661 Views
Registered: ‎02-27-2008

Re: Jtag for XC3S250E and FMC

a,

 

The 3.3v device should see 2.5v as a valid logic high, and the 2.5v device is not over-driven by a 3.3v device because it has a 100 ohm resistor in series.

 

JTAG Dongle     2.5v FPGA Device     3.3v FPGA

GND---------------------GND----------------------GND

VDD----------------------2.5v----------no connection

CLK----------------------CLK----------------------CLK

DO------------------------DI

                                      DO------------------------DI

                                      DI-----100 ohms------DO

DI-------------------------DO

 

Is that clear?  All signals should be together in twisted pair cable between boards (signal/ground pair for each)...

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Visitor adspmoyle
Visitor
6,655 Views
Registered: ‎12-19-2014

Re: Jtag for XC3S250E and FMC

Your pic is not quite right as the Jtag "Dongle" is built into the ZC706 so it is on the other side of the 3.3v device. But notwithstanding that I hooked it up with a paralleled 180 ohm resistors between the TDO from the FMC board (J5) and the TDI on the papilio and all the rest direct.

This produced no change between what I had been getting. If I remove the TDI and TDO wires from the Papilio and connect together with the resistors in series, it passes the IDCODE loop test.
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