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Visitor bldelacr
Registered: ‎08-05-2019

Unexpected Signals with ML605 FPGA & AD9129



I'm a new Xilinx user trying to use the following Reference Design from Analog Devices with their AD9129 Evaluation Board and DAC-FMC Interposer with the Xilinx ML-605 FPGA and ISE Design Suite 14.7 found at this link:




Using the Reference Design above, I am able to output the depicted 300 MHz tone. However, I wanted to take this design and modify it to make this device output any desired waveform in the 1.4 GHz range.


Starting with the ML605 Source files found on the Analog Devices webpage above, I open the project in Xilinx Platform Studio and update the cores, then close XPS and run the CORE Generator to regenerate the cores. Next, I configure the Verilog files to include a LUT of 288 values to be converted by the FPGA and digital-analog converter (DAC) to a continuous voltage signal.


I am attaching the modified Verilog file where I have a sample LUT in, as well as the C code file that I am compiling with the LUT file containing a method to switch between the compiled LUT signal and a sine wave generated by direct digital synthesis (DDS) through the Software Development Kit (SDK).


The problem I am having is when I use this modification to include a lookup table (LUT) and try to send out a signal with the AD9129. While XPS is able to compile the full bitstream, the DAC device outputs unexpected signals. I have several images depicting the pre-generated waveforms I am expecting out of this device and the actual outputs I am seeing on an oscilloscope.


I have tried changing the LUT values within the same project to see if the signals change and correct themselves, but they do not. Creating brand new projects by restarting the whole process also yields the exact same unexpected signals.


I am considering changing my workstation and starting with a clean installation of the ISE Design Suite to see if there may be a problem with XPS updating the wrong files/libraries/projects. But I wanted to post here to ask if anyone can point out anything I may have missed or help out in any way.


I appreciate all and any help, thank you.

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