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Observer jemerson
Observer
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Registered: ‎12-03-2018

VCU108 DDS Clocking and Implementation

Hello,

My company is currently trying to create a signal generator using DDS implemented on a VCU108 FPGA evaluation board and, by using TI's DAC DAC38RF80EVM (http://www.ti.com/tool/dac38rf80evm), create a sinusoidal output at a desired carrier frequency. The signals we are hoping to generate are in the low GHz range with a maximum frequency being 2GHz. We also intend to use the FMC connectors on both boards as the interface using the JESD204 standard (and IP block in Vivado).

We understand that the sampling rate (i.e. the clock used) would have to be at least 2 times the desired output as determined by the Nyquist Criterion (we've opted for a DAC that can sample at 3-4 times the maximum desired output frequency of 2GHz). That said, we were initially looking at an adjustable differential clock to be interfaced at the SMA connections present on the board. 

When looking at the configuration settings for the FMC connection on the VCU108, it was noticed that the only two source clocks selectable (excluding the mezzanine cards) were the user programmable clock (max freq. of 810 MHz) and the jitter attenuated clock, not the external user clock. Additionally, the JESD204 IP block can only be configured up to 800MHZ for the reference clock. However, the GTH transceivers used at the FMC connector have line rates up to 16Gbps.

This all may be do to some knowledge gap, but how can the GTH transceivers transmit at such a fast line rate when the reference clock is several magnitudes slower? And to that end, is it possible to create a 2GHz signal using DDS with our current equipment?

 

Thanks for any help or insight you may be able to give us,

 

Jared

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Observer jemerson
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Registered: ‎12-03-2018

Re: VCU108 DDS Clocking and Implementation

In reading through the documentation for the JESD204 documentation it appears that I made a wrong assumption and that the GTH transceivers require their own separate reference clock external to that of the device clock required for our specific application, correct?

What then would your recommendation be for the GTH reference clock? Like what are the tradeoffs of higher freq. vs. performance and based on our application is there a recommended freq. to select?

To that end, further validation of what I've already stated, examples that might be similar to our application, and any advice would really be appreciated here. 

Thanks,

Jared

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