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Visitor duane
Visitor
436 Views
Registered: ‎04-03-2018

ZCU102 PCI Legacy INTx support

We are using the Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit. We have a PCI card that we are also evaluating with this card.

 

We have ported the Linux driver which is loading however, the board is assigned interrupt 0. Of course this can't be correct. (Perhaps I should say that the board is not being assigned a legacy INT.)

 

The PCI card only supports legacy INTx PCI. The card does not support MSI.

 

Can the ZCU102 support this board? What do I need to do to enable support? We are using the default configuration files with only minor changes unrelated to PCI.

 

I also noticed in the boot log

 

 

[    1.594175] nwl-pcie fd0e0000.pcie: Link is UP
[    1.594218] OF: PCI: host bridge /amba/pcie@fd0e0000 ranges:
[    1.594243] OF: PCI:   MEM 0xe0000000..0xefffffff -> 0xe0000000
[    1.594259] OF: PCI:   MEM 0x600000000..0x7ffffffff -> 0x600000000
[    1.594370] nwl-pcie fd0e0000.pcie: PCI host bridge to bus 0000:00
[    1.594387] pci_bus 0000:00: root bus resource [bus 00-ff]
[    1.594402] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff]
[    1.594416] pci_bus 0000:00: root bus resource [mem 0x600000000-0x7ffffffff pref]
[    1.594954] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.595293] pci 0000:02:04.0: unsupported PM cap regs version (7)
[    1.595498] pci 0000:00:00.0: BAR 8: assigned [mem 0xe0000000-0xe00fffff]
[    1.595516] pci 0000:01:00.0: BAR 8: assigned [mem 0xe0000000-0xe00fffff]
[    1.595531] pci 0000:01:00.0: BAR 7: no space for [io  size 0x1000]
[    1.595546] pci 0000:01:00.0: BAR 7: failed to assign [io  size 0x1000]
[    1.595562] pci 0000:02:04.0: BAR 0: assigned [mem 0xe0000000-0xe00001ff]
[    1.595583] pci 0000:02:04.0: BAR 2: assigned [mem 0xe0000200-0xe00003ff]
[    1.595602] pci 0000:02:04.0: BAR 1: no space for [io  size 0x0100]
[    1.595616] pci 0000:02:04.0: BAR 1: failed to assign [io  size 0x0100]
[    1.595630] pci 0000:01:00.0: PCI bridge to [bus 02]
[    1.595650] pci 0000:01:00.0:   bridge window [mem 0xe0000000-0xe00fffff]
[    1.595676] pci 0000:00:00.0: PCI bridge to [bus 01-0c]
[    1.595691] pci 0000:00:00.0:   bridge window [mem 0xe0000000-0xe00fffff]

 

In particular the statements

 

[    1.595531] pci 0000:01:00.0: BAR 7: no space for [io  size 0x1000]
[    1.595546] pci 0000:01:00.0: BAR 7: failed to assign [io  size 0x1000]


[    1.595602] pci 0000:02:04.0: BAR 1: no space for [io  size 0x0100]
[    1.595616] pci 0000:02:04.0: BAR 1: failed to assign [io  size 0x0100]

The board only has one slot and the card is in that slot.

 

Thanks for any help.

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Visitor duane
Visitor
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Registered: ‎04-03-2018

Re: ZCU102 PCI Legacy INTx support

We've learned a bit more but still have not been able to have the card function.

 

The card is a PMC card that is on a PCIe bridge. So PCIe is being presented to the ZCU102. The PMC card is a legacy PCI card, so the card requires legacy interrupt support. 

 

The interrupt presented to the driver by the OS is interrupt 0. The PCIe Root Port acquires the misc interrupt at 50. But the PCI card at 02:04.0 is assigned IRQ 0, which makes no sense. 

 

There is entry in /proc/interrupts which corresponds to the root port.

 

 

 

 50:          0          0          0          0  nwl_pcie:legacy   1 Level     PCIe PME

 

 

How can the legacy interrupt be properly mapped?

 

The results of lspci:

 

 

# lspci -vvv
00:00.0 PCI bridge: Xilinx Corporation Device d021 (prog-if 00 [Normal decode])
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0
	Interrupt: pin A routed to IRQ 50
	Bus: primary=00, secondary=01, subordinate=0c, sec-latency=0
	I/O behind bridge: 00000000-00000fff
	Memory behind bridge: e0000000-e00fffff
	Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [60] Express (v2) Root Port (Slot-), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 0
			ExtTag- RBE+
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend+
		LnkCap:	Port #0, Speed 5GT/s, Width x1, ASPM not supported, Exit Latency L0s unlimited, L1 unlimited
			ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt+ ABWMgmt-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible+
		RootCap: CRSVisible+
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
		DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [100 v1] Device Serial Number 00-00-00-00-00-00-00-00
	Capabilities: [10c v1] Virtual Channel
		Caps:	LPEVC=0 RefClk=100ns PATEntryBits=1
		Arb:	Fixed- WRR32- WRR64- WRR128-
		Ctrl:	ArbSelect=Fixed
		Status:	InProgress-
		VC0:	Caps:	PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
			Arb:	Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
			Ctrl:	Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
			Status:	NegoPending- InProgress-
	Capabilities: [128 v1] Vendor Specific Information: ID=1234 Rev=1 Len=018 <?>
	Kernel driver in use: pcieport

01:00.0 PCI bridge: Tundra Semiconductor Corp. Device 8114 (rev 03) (prog-if 00 [Normal decode])
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Bus: primary=01, secondary=02, subordinate=02, sec-latency=0
	I/O behind bridge: 0000f000-00000fff
	Memory behind bridge: e0000000-e00fffff
	Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
	Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
	BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [80] PCI-X bridge device
		Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=conv
		Status: Dev=01:00.0 64bit- 133MHz- SCD- USC- SCO- SRD-
		Upstream: Capacity=32 CommitmentLimit=32
		Downstream: Capacity=4 CommitmentLimit=4
	Capabilities: [a0] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [c0] Express (v1) PCI-Express to PCI/PCI-X Bridge, MSI 00
		DevCap:	MaxPayload 512 bytes, PhantFunc 0
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ SlotPowerLimit 0.000W
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- BrConfRtry-
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr+ FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 2.5GT/s, Width x4, ASPM L0s, Exit Latency L0s <512ns, L1 <1us
			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
	Capabilities: [100 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-

02:04.0 Bridge: PLX Technology, Inc. PCI9056 32-bit 66MHz PCI <-> IOBus Bridge (rev ac)	Subsystem: PLX Technology, Inc. Device 3101
	Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
	Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Interrupt: pin A routed to IRQ 0	Region 0: Memory at e0000000 (32-bit, non-prefetchable) [disabled] [size=512]
	Region 1: I/O ports at <unassigned> [disabled]
	Region 2: Memory at e0000200 (32-bit, non-prefetchable) [disabled] [size=512]
	Capabilities: [40] Power Management version 7
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 NoSoftRst- PME-Enable+ DSel=15 DScale=0 PME-
	Capabilities: [48] CompactPCI hot-swap <?>
	Capabilities: [4c] Vital Product Data
pcilib: sysfs_read_vpd: read failed: Input/output error
		Not readable

 

 

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