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Visitor ivrfengines
Visitor
111 Views
Registered: ‎05-14-2018

ZCU106

Hi

I have been trying to get an SDI input with an SFP PL based ethernet connection working in the same design.

I took the sdirxtx ref design and added the 1/2.5GHz ethernet subsystem and connected to SFP1 with the ref clock sourced from SFP_SI5328_OUT.  The SDI ref is fed from USER_MGT_SI570_CLOCK1 as per ref design.

I have managed to get either the ethernet to ping and be recognised but the SDI receiver does not recognise any input. Or the ethernet is not recognised and the SDI input is detected ok. By changing the si5328 and si570 settings within the system-user.dtsi affect which work, but cant get both working together.

Are these functions mutually exclusive, possibly due to the SFPs and SDI tranceivers being in the same quadrant and perhaps limitted clock routing?

Thanks for any help.

Ian

 

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3 Replies
Moderator
Moderator
64 Views
Registered: ‎04-12-2017

Re: ZCU106

Hello @ivrfengines 

for a quick suggestion i will recommend you to refer our VCU trd example design.

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/38109263/Zynq+UltraScale+MPSoC+VCU+TRD+2018.3+-+10G+HDMI+Video+Capture+and+HDMI+Display

although we have implemented this for HDMI, you can move it to SDI.

Thank you

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Visitor ivrfengines
Visitor
58 Views
Registered: ‎05-14-2018

Re: ZCU106

Hi kvasntr,

I actually did use the VCU trd design, but added my ethernet to the sditx_rx design.

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/31686693/Zynq+UltraScale+MPSoC+VCU+TRD+2018.3+-+SDI+Video+Capture+and+SDI+Display

This is when I get the error described.

Thanks

Ian

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Visitor ivrfengines
Visitor
56 Views
Registered: ‎05-14-2018

Re: ZCU106

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