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Observer inge
Observer
676 Views
Registered: ‎02-13-2010

AR# 67221 vs config mode setting in Zynq.

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To ensure correct fallback to golden boot the  AR# 67221 states that the D2 and D3 datapins for the QSPI flash should be connected to 4K7 pullup's.

But looking at the Zynq xc7z030fbg676 these pins are also used as config mode pins.

QSPI D2 = mode pin M2 = FPGA pin F24, and QSPI D3 = mode pin M3 = FPGA pin C26.

Following AR# 67221 both M2 and M3 will be pulled high resulting in boot from SD card, and the Zynq can not be set to be booting from QSPI flash. Have I misunderstood? How can this be solved so it is possible to boot from the QSPI ensuring correct fallback?

 

 

 

 

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Xilinx Employee
Xilinx Employee
920 Views
Registered: ‎01-10-2012

Re: AR# 67221 vs config mode setting in Zynq.

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Hi @inge

 

The AR is not applicable to Zynq.  The AR is only for FPGA which configures in Master mode.

For Zynq(SoC) the PL block configuration is controlled by the PS(ARM processor) and hence the configuration mode and explanation in AR is not applicable.

 

For Zynq multiboot you can refer to this link.

http://www.wiki.xilinx.com/Zynq-7000+AP+SoC+Boot+-+Multiboot+Tech+Tip

 

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Xilinx Employee
Xilinx Employee
921 Views
Registered: ‎01-10-2012

Re: AR# 67221 vs config mode setting in Zynq.

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Hi @inge

 

The AR is not applicable to Zynq.  The AR is only for FPGA which configures in Master mode.

For Zynq(SoC) the PL block configuration is controlled by the PS(ARM processor) and hence the configuration mode and explanation in AR is not applicable.

 

For Zynq multiboot you can refer to this link.

http://www.wiki.xilinx.com/Zynq-7000+AP+SoC+Boot+-+Multiboot+Tech+Tip

 

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Observer inge
Observer
641 Views
Registered: ‎02-13-2010

Re: AR# 67221 vs config mode setting in Zynq.

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Hi @gurupra, Thank you for the quick reply. Sorry I didn't notice that it did not apply to the Zynq. My fault thank you for guiding me.
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