04-19-2017 05:40 AM
i am currently working on a kintex 7 design and i want to implement a register (which can be read by a link partner) which has an unique FPGA device ID in it...
Because the DNA_PORT value (57 Bit) is not unique, i plan to generate the FUSE_DNA value in my design.
We know from ug470 that the bits [63:7] of FUSE_DNA are defined as the value from DNA_PORT [0:56].
But how are the bits [6:0] of FUSE_DNA defined?
04-19-2017 08:49 AM
Those are for you to assign in your design. It may be part of your configuration, or it may be a derived value you create.
04-20-2017 02:55 AM
thanks for your reply.
It would be ideal to have the same value in my register as FUSE_DNA would provide when somebody reads it per JTAG...
-> to be consistent.
So anybody knows how the Bits [6:0] are defined?
I will try to find it out by myself..
-> if i dont find it out i will define something by myself like austin recommended.
10-01-2018 02:47 AM - edited 10-01-2018 02:48 AM
please how did you go about it? Did you define something as recommended by Austin ?. I am currently having a similar challenge and i would like to know how you went about solving it.