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Adventurer
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Registered: ‎01-26-2017

Figure A7 FPGA with 2.5V VCCO_0

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XC7A35T-2CSG325I, BANK_14 is powered by 2.5V IO level for LVDS. It seems BANK_0 must be powered by 2.5V IO level also. The SPI FLASH chip for configuration now is request support 2.5V IO standard. I find the one list in vivado is is25lp032d family. According to the spec of it, the VCC for these flash chips is 2.3V - 3.6V. The question is : Can I directly use is25lp032d family chip to configure XC7A35T-2CSG325I FPGA with VCC powered as same as 2.5V?
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Registered: ‎01-22-2015

Re: Figure A7 FPGA with 2.5V VCCO_0

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@rggber 

Can I directly use is25lp032d family chip to configure XC7A35T-2CSG325I FPGA with VCC powered as same as 2.5V?

Yes. 

Table 41 of UG908 (v2020.1) shows that is25lp032d is Xilinx-approved for use with Artix-7.

Table 2-6 of UG470 (v1.13.1) shows that VCCO_0 and VCCO_14 can be set to 2.5V for configuration of Artix-7.  Note that you must also tie CFGBVS pin to VCCO_0.

Cheers,
Mrak

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Registered: ‎01-22-2015

Re: Figure A7 FPGA with 2.5V VCCO_0

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@rggber 

Can I directly use is25lp032d family chip to configure XC7A35T-2CSG325I FPGA with VCC powered as same as 2.5V?

Yes. 

Table 41 of UG908 (v2020.1) shows that is25lp032d is Xilinx-approved for use with Artix-7.

Table 2-6 of UG470 (v1.13.1) shows that VCCO_0 and VCCO_14 can be set to 2.5V for configuration of Artix-7.  Note that you must also tie CFGBVS pin to VCCO_0.

Cheers,
Mrak

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