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sean.durkin
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Registered: ‎05-15-2013

Multiboot and SPI 32bit-addressing mode

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Hi,

 

I'm at the moment trying to implement multiboot (no fallback) from an SPI-flash for an Artix7 device.

 

I can set the WBSTAR register and issue an IPROG command to trigger reloading of another bitstream, that works perfectly... UNLESS I enable the 32bit adress mode for the initial bitfile.


In that case, whenever I issue an IPROG, the FPGA always reloads from address 0 and ignores whatever address I put into WBSTAR. The FPGA logic is identical, I just use different settings for generating the bitfile (I load my post-route checkpoint and run write_bitstream twice, once with 32bit-mode enabled, once without.). So this is the exact same bitfile, it just puts the SPI configuration interface in 32bit-mode, which seems to break the WBSTAR-mechanism somehow.

 

Is there any difference in the mutiboot sequence from ug470 (p. 126) or in setting WBSTAR depending on what adressing mode the SPI is in?

 

Greetings,

Sean

 

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smarell
Community Manager
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Registered: ‎07-23-2012
Can you please post the prm file and the icap state machine code? The warm boot address should be given correctly based on the addressing mode you select.

For example, if you have stored the multiboot image at 0x01000000. Then for non 32 bit mode addressing, the value that you should write to warm boot address register is 0x80000000 (after byte-swap) and for 32-bit addressing mode is 0x00800000.

Please check this.

Regards,
Krishna
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smarell
Community Manager
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Registered: ‎07-23-2012
Can you please post the prm file and the icap state machine code? The warm boot address should be given correctly based on the addressing mode you select.

For example, if you have stored the multiboot image at 0x01000000. Then for non 32 bit mode addressing, the value that you should write to warm boot address register is 0x80000000 (after byte-swap) and for 32-bit addressing mode is 0x00800000.

Please check this.

Regards,
Krishna
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sean.durkin
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Registered: ‎05-15-2013

Hi Krishna,

 

thanks for the quick response! Shifting the address fixed it. Why is this not mentioned in the documentation, or did I miss something?

 

I suppose this is because WBSTAR only has space for 29 address bits? The lower address byte is skipped and the configuration logic automatically adds 0x00. So I suppose all bitstreams must start at addresses that are aligned to 256-byte-boundaries?

 

Makes sense, but this really should be mentioned in ug470 somewhere...

 

Thanks again!

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kready
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Registered: ‎01-12-2014
Hi, I got some problems that download multiboot files(.mcs) in ISE iMACT(P.58). The ISE iMACT(P.58) can't work when I download the multiboot file in 7% every time. I had strucked sevelal days,Can you help me ? Is somewhere that I didn't configue?
thank you !
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adrian.h
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Registered: ‎03-03-2011

Thanks for posting this, I have just been struggling with exactly the same problem. I agree that this really should be detailed in the documentation.

 

Cheers

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smarell
Community Manager
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Registered: ‎07-23-2012
Since this is a different issue, please open a new thread.
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Anonymous
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Hi,Krishna could you show me how to set the warm boot address for SPI 32bit-addressing mode? I don't know how do you make the map from 0x01000000(multiboot image stored in spi flash) to 0x00800000(warm boot address). I am look forward to you! best regards, lijiyun
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davekeeshan
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Registered: ‎01-06-2014

Agreed, is there documentation any where on this now.  It looks like an 8 bit shift for a 32 bit aligned address, surely it should be 5 bits.  And is there a consistancy of documentation,  I see commands and byte swapped commands interleaved and it gets confusing to separate the two.

 

In my case I have an image located at 0x00A0_0000, what bit shift should I do for 32 bit addressing (0x0000_A000?) and what does it become when it is byte swapped (0x0000_0500?).

 

 

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trenz-al
Scholar
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Registered: ‎11-09-2013

its all already in xilinx documents described, just need to digg deep

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pengchengfei
Newbie
Newbie
13,432 Views
Registered: ‎02-01-2015

where,I couldn't find it

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kkn
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Registered: ‎01-15-2008

check the following link

http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf

 

Note-1 of table 7-2

 

-Krishna

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ofer.bahar
Contributor
Contributor
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Registered: ‎03-07-2014

Hello

 

I went into the same issue and the bit swapping and shifting 1 byte right if 32bit addressing - WORKS

 

thanks

 

Ofer

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