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Highlighted Observer
186 Views
Registered: ‎04-03-2020

## Multiplying two unsigned

I want to multiply two ADC data to do an IQ extraction (In-Phase/Quadrature Extraction). I do it in the unsigned domain because using integer faced me with the problems I discussed here. To ensure the validity of the multiplication, I just multiply the DC value of the ADC by itself and put it in a tmp variable with a 2X length. Finally, I grab the MSB sides of the temp and send it to MATLAB. The simplified version of the code:

``````entity IQ_Extract is
port (
iq_inph_adc1 : out unsigned (15 downto 0);
spi_adc1_miso : in unsigned (15 downto 0));
end IQ_Extract;
architecture Behavioral of IQ_Extract is
begin
variable tmp : unsigned (31 downto 0);
begin
end if;
end process;
end Behavioral; ``````

I have tested the code with MATLAB and it's working well: I modified the code and just send the ADC data to the output like the following

``iq_inph_adc1 <= spi_adc1_miso;``

and I get the ADC data directly in MATLAB (the value is 0.98).

When I run the main multiplication code, I expect to get 0.96 (= 0.98 *0.98) but I get 0.036. Note that 0.96/0.036 (Ideal Value/Actual Value) is 26.66, if I am taking the wrong bits this ratio should be somehow close to a factor of 2.

I was wondering if you can help me with this problem. Thank you very much for your help.

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1 Solution

Accepted Solutions
Highlighted Scholar
183 Views
Registered: ‎08-01-2012

Taking only the MSBs i like dividing by 2^16

How many integer and fraction bits are you expecting in the 16 bit input? Assuming 8.8 (8 integer, 8 fraction), 0.98 cannot be exactly represented. the best you can do is 0.9765625, giving you a square value of 0.95367431640625 (you'll get closer by using more fraction bits)

This problem looks like a problem of intepreting the integer/fraction separation rather than anything wrong with the VHDL.

2 Replies
Highlighted Scholar
184 Views
Registered: ‎08-01-2012

Taking only the MSBs i like dividing by 2^16

How many integer and fraction bits are you expecting in the 16 bit input? Assuming 8.8 (8 integer, 8 fraction), 0.98 cannot be exactly represented. the best you can do is 0.9765625, giving you a square value of 0.95367431640625 (you'll get closer by using more fraction bits)

This problem looks like a problem of intepreting the integer/fraction separation rather than anything wrong with the VHDL.

Highlighted Observer
65 Views
Registered: ‎04-03-2020

Thank you for your reply, since this is an ADC and I am comparing the output with a "1111....111" output, so the output is a fraction with no integer. Knowing this, I was able to locate the MSB and get the right data. Thanks.