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ali_flt
Adventurer
Adventurer
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Registered: ‎08-10-2020

Only one CFG_CONFIG tile in FPGA: ERROR: [Place 30-1100] Failed to do pre-placement.

Hi,
I'm using a ZCU104 evaluation board and trying to do partial reconfiguration on it. My reconfigurable modules have debug cores therefore I've instantiated a debug bridge in each of them and connected the BSCAN ports to the external interface. 
After synthesis and linking the design in vivado non-project mode, everything seems to be fine but when I try to run place_design I see the following error:

 

ERROR: [Place 30-1100] Failed to do pre-placement. Reason: Cannot place instance dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_BSCAN_PRIM.bscan_inst/SERIES7_BSCAN.bscan_inst of type BSCANE2 in site CONFIG_SITE_X0Y0 with message dbg_hub/inst/BSCANID.u_xsdbm_id/SWITCH_BSCAN_PRIM.bscan_inst/SERIES7_BSCAN.bscan_inst placed on site CONFIG_SITE_X0Y0 rpm (2504, 253)  tile (359, 247) CFG_CONFIG_X62Y120 is outside its area constraints. The BSCANE2 can be only instantiated in the master SLR in SSI devices.

 

And After Investigating the "CFG_CONFIG_X62Y120" Tile, I understood that this tile is inside one of my reconfigurable partitions and thus can't be placed in the static part (where the debug hub is). But the shocking part for me was to see that there is only one CFG_CONFIG tile on my FPGA and therefore, this instance cannot be placed anywhere else. 
Is there anyway to tell the design to use another tile for this SERIES7_BSCAN.bscan_inst BSCANE2 primitive? Because I really don't want to change my Pblock constraints.
Here is a picture of the mentioned TILE : 

ali_flt_1-1621323261004.png

Thanks,
Ali

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