10-14-2019 02:02 PM
Hello,
We are considering the Ultrascale (Virtex & Kintex) and Ulstrascale+ architectures (Virtex, Kintex, Zynq).
Firstly, we are considering bitstream encryption. According to the documentation, either BBRAM or eFuse can be use to store the AES 256 bit bitstream encryption key.
Can you confirm that both are "black" keys, meaning that they CANNOT be read internally from the fabric?
Secondly, we are considering using 3 efuses with our logic inside the fabric and we have the following questions:
Thanks for your answers.
Regards
Yorg
10-17-2019 07:06 PM
1. Once programmed, the keys cannot be read out by any means.
2. You can program the two internally by MASTER_JTAG. Check this:
10-17-2019 07:06 PM
1. Once programmed, the keys cannot be read out by any means.
2. You can program the two internally by MASTER_JTAG. Check this:
11-04-2019 02:38 PM
Hello,
I have one additional question, I am assuming that the internal MASTER_JTAG, being a JTAG gives access to the entire logic of the FPGA just like the external JTAG does. If that is correct, is it possible to limit the "reach" of the internal MASTER_JTAG just to the programmable fuses? For instance if the Microblaze IP is used to program the user fuses, it would be helpful to make sure it cannot also reach into the rest of the programmable logic to prevent bugs, etc.
Thanks
Thierry