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Participant sharpwind
Participant
848 Views
Registered: ‎12-07-2008

SPARTAN 6 JTAG program fail

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HI,

   I have a custom board which includes 2 xc6slx45tcsg324 and a XCF32PVOG48C, now I have some trouble in programming them through JTAG.

  The two FPGAs are daisy chained as shown in the attched PDF file.

  I have tried 3 different designs and they behave quite different, it seems that adding a DCM to my design makes great different.

  1. the first design is just a SPI interface, and  I toggle a gpio that drives a LED, so that I can easily see if the design is downloaded and running.

  2. the second design is just as the first one, except for that an DCM is added, which has just one output clk ,and that clk is used to drive all my logics.

   3. the third design is just as the the second one, except for that the DCM has two output clocks, the second output clk is left floated.

 

    Here is the programming results:

    1. when DONE pins of the two FPGA are shorted (R26 assembled), programming through JTAG will always fail, while programming through PROM will be OK. Only Design 1 is tested for this case.

    2. when DONE pins of the two FPGA are not shorted (R26 removed):

    2a: for design 1, program will always OK.

    2b: for design 2, program FPGA 0 will always OK. BUT, if i successfully program FPGA 1 (which iMPACT will show fail but actually the design is running), then I lose access to the Whole jtag chain, i can do nothing any more....unless repower the board.

    2c: for design 3, program will always fail,  for both of the FPGA.

    

  I can not imaging how a DCM module will influence the program process, please tell me where I have done wrong(the schematic, or the program process).

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1 Solution

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Participant sharpwind
Participant
783 Views
Registered: ‎12-07-2008

Re: SPARTAN 6 JTAG program fail

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hi,

the problem is soloved.

turns our TDO is driven by VCCAUX in spartan, not VCCIO of bank 2(virtex). The schamatic engineer put a 330 o resistor between vcc3.3v and VCCAUX, which results in a VCCAUX voltage of 1.8V.

just replace the 330 o resistor by a 10 o one fix the problem.

 

as for the mode pin inconsistence, I think it is a result of sampling time difference, i mean before and after configuration.

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4 Replies
Participant sharpwind
Participant
842 Views
Registered: ‎12-07-2008

Re: SPARTAN 6 JTAG program fail

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FPGA 0 : Done pins not shorted : OK [design 1 or design 2]

INFO:iMPACT - Current time: 2018/9/3 16:54:24

PROGRESS_START - Starting Operation.

Maximum TCK operating frequency for this device chain: 15000000.

Validating chain...

Boundary-scan chain validated successfully.

'2': Programming device...

 LCK_cycle = 6.

done.

'2': Reading status register contents...

[0] CRC ERROR                                                              :         0

[1] IDCODE ERROR                                                           :         0

[2] DCM LOCK STATUS                                                        :         1

[3] GTS_CFG_B STATUS                                                       :         1

[4] GWE STATUS                                                             :         1

[5] GHIGH STATUS                                                           :         1

[6] DECRYPTION ERROR                                                       :         0

[7] DECRYPTOR ENABLE                                                       :         0

[8] HSWAPEN PIN                                                            :         1

[9] MODE PIN M[0]                                                          :         1

[10] MODE PIN M[1]                                                         :         1              <-----------THIS SHOULD BE 0 

[11] RESERVED                                                              :         0

[12] INIT_B PIN                                                            :         1

[13] DONE PIN                                                              :         1

[14] SUSPEND STATUS                                                        :         0

[15] FALLBACK STATUS                                                       :         0

INFO:iMPACT:2219 - Status register values:

INFO:iMPACT - 0011 1100 1110 1100

INFO:iMPACT:579 - '2': Completed downloading bit file to device.

INFO:iMPACT:188 - '2': Programming completed successfully.

 LCK_cycle = 6.

INFO:iMPACT - '2': Checking done pin....done.

'2': Programmed successfully.

PROGRESS_END - End Operation.

Elapsed time =      3 sec.

 

FPGA 0 : Done shored : iMPACT says OK , DONE Ppin goes HIGH, the LED dosen't toggle. [design 1]

INFO:iMPACT - Current time: 2018/9/3 16:57:27

PROGRESS_START - Starting Operation.

Maximum TCK operating frequency for this device chain: 15000000.

Validating chain...

Boundary-scan chain validated successfully.

'2': Programming device...

 LCK_cycle = 6.

done.

'2': Reading status register contents...

[0] CRC ERROR                                                              :         0

[1] IDCODE ERROR                                                           :         0

[2] DCM LOCK STATUS                                                        :         1

[3] GTS_CFG_B STATUS                                                       :         0

[4] GWE STATUS                                                             :         0

[5] GHIGH STATUS                                                           :         1

[6] DECRYPTION ERROR                                                       :         0

[7] DECRYPTOR ENABLE                                                       :         0

[8] HSWAPEN PIN                                                            :         0

[9] MODE PIN M[0]                                                          :         1

[10] MODE PIN M[1]                                                         :         0

[11] RESERVED                                                              :         0

[12] INIT_B PIN                                                            :         1

[13] DONE PIN                                                              :         0

[14] SUSPEND STATUS                                                        :         0

[15] FALLBACK STATUS                                                       :         0

INFO:iMPACT:2219 - Status register values:

INFO:iMPACT - 0010 0100 0100 1000

INFO:iMPACT:579 - '2': Completed downloading bit file to device.

INFO:iMPACT:188 - '2': Programming completed successfully.

 LCK_cycle = 6.

INFO:iMPACT - '2': Checking done pin....done.

'2': Programmed successfully.

PROGRESS_END - End Operation.

Elapsed time =      3 sec.

 

FPGA 1 : DONE NOT SHORTED, iMPACT says failed ,but the LED is toggling [design 2]

this will only success after FPGA 0 is programed first.

INFO:iMPACT - Current time: 2018/9/3 17:00:37

PROGRESS_START - Starting Operation.

Maximum TCK operating frequency for this device chain: 15000000.

Validating chain...

Boundary-scan chain validated successfully.

'3': Programming device...

 LCK_cycle = 6.

done.

'3': Reading status register contents...

[0] CRC ERROR                                                              :         0

[1] IDCODE ERROR                                                           :         0

[2] DCM LOCK STATUS                                                        :         0

[3] GTS_CFG_B STATUS                                                       :         0

[4] GWE STATUS                                                             :         0

[5] GHIGH STATUS                                                           :         0

[6] DECRYPTION ERROR                                                       :         0

[7] DECRYPTOR ENABLE                                                       :         0

[8] HSWAPEN PIN                                                            :         0

[9] MODE PIN M[0]                                                          :         0

[10] MODE PIN M[1]                                                         :         0

[11] RESERVED                                                              :         0

[12] INIT_B PIN                                                            :         0

[13] DONE PIN                                                              :         0

[14] SUSPEND STATUS                                                        :         0

[15] FALLBACK STATUS                                                       :         0

INFO:iMPACT:2219 - Status register values:

INFO:iMPACT - 0000 0000 0000 0000

INFO:iMPACT:579 - '3': Completed downloading bit file to device.

INFO:iMPACT:188 - '3': Programming completed successfully.

 LCK_cycle = 6.

INFO:iMPACT - '3': Checking done pin....done.

'3': Programming terminated. DONE did not go high.

PROGRESS_END - End Operation.

Elapsed time =      3 sec.

BUT, After that, I lose control of the jtag chain. I can do nothing(program, read device statue, initial chain…)

INFO:iMPACT - Current time: 2018/9/3 17:01:55

PROGRESS_START - Starting Operation.

INFO:iMPACT:583 - '2': The idcode read from the device does not match the idcode in the bsdl File.

INFO:iMPACT:1578 - '2':  Device IDCODE :        00000000000000000000000000000000

INFO:iMPACT:1579 - '2': Expected IDCODE:    00000100000000101000000010010011

PROGRESS_END - End Operation.

Elapsed time =      0 sec.

 

 

 

 

DESIGN 3 : Fail for both FPGA

INFO:iMPACT - Current time: 2018/9/3 17:30:19

PROGRESS_START - Starting Operation.

Maximum TCK operating frequency for this device chain: 15000000.

Validating chain...

Boundary-scan chain validated successfully.

'2': Programming device...

 LCK_cycle = NoWait.

done.

'2': Reading status register contents...

[0] CRC ERROR                                                              :         0

[1] IDCODE ERROR                                                           :         0

[2] DCM LOCK STATUS                                                        :         0

[3] GTS_CFG_B STATUS                                                       :         0

[4] GWE STATUS                                                             :         0

[5] GHIGH STATUS                                                           :         0

[6] DECRYPTION ERROR                                                       :         0

[7] DECRYPTOR ENABLE                                                       :         0

[8] HSWAPEN PIN                                                            :         0

[9] MODE PIN M[0]                                                          :         0

[10] MODE PIN M[1]                                                         :         0

[11] RESERVED                                                              :         0

[12] INIT_B PIN                                                            :         0

[13] DONE PIN                                                              :         0

[14] SUSPEND STATUS                                                        :         0

[15] FALLBACK STATUS                                                       :         0

INFO:iMPACT:2219 - Status register values:

INFO:iMPACT - 0000 0000 0000 0000

INFO:iMPACT:579 - '2': Completed downloading bit file to device.

INFO:iMPACT:188 - '2': Programming completed successfully.

 LCK_cycle = NoWait.

INFO:iMPACT - '2': Checking done pin....done.

'2': Programming terminated. DONE did not go high.

PROGRESS_END - End Operation.

Elapsed time =      3 sec.

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Participant sharpwind
Participant
800 Views
Registered: ‎12-07-2008

Re: SPARTAN 6 JTAG program fail

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The problem may be related to TDO pin. I have test TDO and the waveform is as below. It is very odd, it seems that TDO is not able to reach a high level, as a result, this jtag chain is very unstable, hence i ofter get all zeros when reading device ID.

dose anyone can explane? please help me out.

微信图片_20180904160845.jpg

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Xilinx Employee
Xilinx Employee
791 Views
Registered: ‎06-21-2018

Re: SPARTAN 6 JTAG program fail

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Regarding the Mode Pins on the Device Status, please take a look at this Answer Record:

https://www.xilinx.com/support/answers/34127.html

 

Thanks,
Andres

 

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Participant sharpwind
Participant
784 Views
Registered: ‎12-07-2008

Re: SPARTAN 6 JTAG program fail

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hi,

the problem is soloved.

turns our TDO is driven by VCCAUX in spartan, not VCCIO of bank 2(virtex). The schamatic engineer put a 330 o resistor between vcc3.3v and VCCAUX, which results in a VCCAUX voltage of 1.8V.

just replace the 330 o resistor by a 10 o one fix the problem.

 

as for the mode pin inconsistence, I think it is a result of sampling time difference, i mean before and after configuration.

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