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Thomas
Observer
Observer
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Registered: ‎04-05-2021

Usage of FPGA differential pins on Zynq-7010

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Hello everyone,

I am currently working on microZed, and I would like to externalize FPGA signals to zynq FPGA pins.

The thing is, most FPGA pins (bank 35) are differential ones, whereas my signals are not.

Thomas_0-1617872611853.png

How should I deal with it ? Should I make my signals differential ?

Thanks for any help,

Regards,

Thomas.

 

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bruce_karaffa
Scholar
Scholar
177 Views
Registered: ‎06-21-2017

You may use any of the IO pins as single ended.

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bruce_karaffa
Scholar
Scholar
213 Views
Registered: ‎06-21-2017

IO pins may be used for either differential or single ended signals. The names in the tables must reflect which pairs of pins need to be used for a differential signal.

Thomas
Observer
Observer
209 Views
Registered: ‎04-05-2021

The thing is, I only see two single-ended pins in bank 35 : JX2_SE_0, JX2_SE_1. (I may be wrong here)

I need more single-ended pins for all my fpga signals, how can I overcome that?

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bruce_karaffa
Scholar
Scholar
178 Views
Registered: ‎06-21-2017

You may use any of the IO pins as single ended.

View solution in original post

Thomas
Observer
Observer
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Registered: ‎04-05-2021

ok thank you !

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