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Registered: ‎06-11-2018

Wear-leveling firmware flash

Is there any wear-leveling scheme for NOR flash that will work with the Artix 7 FPGA? I am looking at using the S25FL256S flash or the N25Q256 3.3V flash if that information helps. 

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Registered: ‎01-22-2015



For others reading this post, flash memory wears out from repeated (~100,000) write/erase cycles.  Wear-leveling is a mechanism that distributes writes/erases evenly throughout the memory – so that no particular part of the memory is excessively used and wears out much quicker than the other parts.


Algorithms for flash wear-leveling would not normally reside in the Artix-7, because the Artix-7 normally only reads from flash (during configuration). Xilinx softwares, Vivado and iMPACT, are used to write/erase flash.  It would take some serious bookkeeping for these software to remember particular flash parts and where in these flash parts they have been writing/erasing stuff.


A possible option for you is the “managed NAND” flash from Micron (see Micron document TN-29-42).  These devices automatically manage their own wear-leveling.  However, you’d have to check Appendix C of Xilinx document UG908 to see if any of these devices are approved for use with the Artix-7.  Unfortunately, I have not seen "managed NOR" flash with wear-leveling.


Finally, the Micron N25Q256 that you mentioned has End-Of-Life status. The Micron N25Q series of flash has been replaced by the Micron M25Q series (see Micron document TN-25-01). We have replaced the N25Q128 on our boards with the MT25QL128 and find they work identically.




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