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Registered: ‎11-08-2017

ddr4 multiple access


we are designing a system with xilinx kintex ultrascale xcku040 connected to a external DDR4. There are 3 VDMAs writing and reading to DDR4 that in some cases can access to DDR4 simultaneously. We have found that some random errors happen when accessing to memory. By using CRCs we have checked that in occasions the data from one of the VDMAs is not written in DDR4. So, when this data is read again we have a non correct value. VDMAs status registers don't show any errors, and sometimes the system works. It seems to be related with number of "ones" in the data bus. 

Our DDR4 memory is MT40A256M16GE-083E, and it has passed the xilinx DDR test in the microblaze examples. 

It is possible that there is any conflict with the memory access so the data is lost? What could be the solution?

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