Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.

- Community Forums
- :
- Forums
- :
- Hardware Development
- :
- FPGA Configuration
- :
- reached max DSP utilization move to logic implemen...

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Mute
- Printer Friendly Page

Highlighted

ffran

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-17-2020 09:27 AM

379 Views

Registered:
10-17-2018

Hi,

i am design a matrix of MACs unit using the IP core already provided however when i increase the size of the matrix, reaching the maximum number of DSPs in my board (220, it is the Zynq7000) i have an implementation error because the required DSP unit are bigger than the available ones.

Is there any way to force (or instruct) Vivado in order to start to use programmable logic as soon as the maximum number of available DSP is reached?

I modified the max_dsp parameter for the synthesis moving to -1, which allows to use the maximum available number of dsp to the effective number of available dsp for the IC, 220. However it didn't change anything.

The board is the PYNQ Z2 from Tul.

1 Solution

Accepted Solutions

Highlighted

dgisselq

Scholar

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-18-2020 04:42 AM

282 Views

Registered:
05-21-2015

To be clear then, the answer to the question of whether or not the tool will automatically generate fabric DSP logic is .... No.

There is no fabric multiplier logic that is or even could be equivalent to the timing of a DSP. (Trust me, I've tried.) The engineer is required to get involved in order to create an appropriate multiply, and to properly adjust his design so that it now interfaces with any such fabric implementation.

Dan

3 Replies

Highlighted

dgisselq

Scholar

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-17-2020 03:49 PM

346 Views

Registered:
05-21-2015

If you swap a DSP element doing an 18x18 multiply for fabric logic, you will need to restrict your speed so much that it would've made more sense to multiplex the DSP's instead. As a result, this isn't really a practical solution to running out of DSPs.

Better solutions might be to ...

- Raise your clock speed to the absolute maximum, and tune the rest of your logic to handle it. You'll need to make sure you are feeding your multiplies at high speed as well, so that's another issue
- Multiplex the DSPs to the point where every DSP is being used on every clock cycle. Indeed, if you aren't using every DSP on every clock cycle, then that's probably where you should first focus your efforts.

Dan

Highlighted

ffran

Visitor

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-18-2020 03:12 AM

297 Views

Registered:
10-17-2018

hi

my rtl is a data flow architecture of for example a 8x8 matrix of MACs (each one of them multiplys and acccumulates on 8 bits) however if i increase the size of the matrix reaching the maximum number of dsp hard fabric (220 in my case) i got an error from the implementation.

I totally understand the implementaiton error, i cannot use something that's not there.

Anyway my question was is there any way to start to implement the DSP function in logic as soon as we run out of DSP cores?

FFran

Highlighted

dgisselq

Scholar

- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Email to a Friend
- Report Inappropriate Content

04-18-2020 04:42 AM

283 Views

Registered:
05-21-2015

To be clear then, the answer to the question of whether or not the tool will automatically generate fabric DSP logic is .... No.

There is no fabric multiplier logic that is or even could be equivalent to the timing of a DSP. (Trust me, I've tried.) The engineer is required to get involved in order to create an appropriate multiply, and to properly adjust his design so that it now interfaces with any such fabric implementation.

Dan