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Observer camccarthy
Observer
4,658 Views
Registered: ‎08-19-2014

CameraLink

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Hello,

 

I am attempting to instantiate the appropirate CameraLink IP for multiple different FPGAs within the same Verilog project. i am doing this by using an input parameter with the name of the component the user is trying to create a CameraLink interface for. An issue I am having is that, if a component is selected, the other code still exists in the project, and some FPGAs don't have certain parts as others do. For example, Spartan 6 parts use OSERDES2 for serialization while Virtex 6 uses OSERDESE1. 

 

If I try to implement for say, Spartan 6, the code for Virtex 6 still exists in the project and gives me errors since the OSERDESE1 component does not exists in a Spartan 6 board. Is there a way I could glaze over the code or perhaps, another way to be doing this?

 

Thank you,

Cam.  

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Observer camccarthy
Observer
8,062 Views
Registered: ‎08-19-2014

Re: CameraLink

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Solved by using generate statements

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Observer camccarthy
Observer
8,063 Views
Registered: ‎08-19-2014

Re: CameraLink

Jump to solution

Solved by using generate statements