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Observer neera84
Observer
5,550 Views
Registered: ‎02-14-2013

Help for FFT 8.0

Hi, I am new to Xilinx .

 I have a signal (real and imaginary) and I want to take FFT of the signal using Xilinx FFT 8.0. I got the documentation of the block. But I am not clear about the input and output pins. Do I need to use every input pins and output pins? Is it OK to use termination blocks for the unused  output pins.I only need real and imaginary output.

 

Could you kindly send me a sample implementation of FFT 8.0.( Simple one). I am confused with the pins.

 

Thank you

 

Neera

 

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6 Replies
Xilinx Employee
Xilinx Employee
5,545 Views
Registered: ‎08-02-2011

Re: Help for FFT 8.0

Hello,

You don't need all of the pins, necessarily. Only the ones you need :)

In short, yes, you can use termination blocks for some outputs and constant blocks for some inputs. Why don't you post what you've gotten so far and we can help get your design up and running.
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Observer neera84
Observer
5,541 Views
Registered: ‎02-14-2013

Re: Help for FFT 8.0

Hi,

Thank you for your reply.

 

I am attaching my mfile and the model file.The output is not accurate. I think I have done some mistake with the input pins.

 

 

Neera

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Observer neera84
Observer
5,529 Views
Registered: ‎02-14-2013

Re: Help for FFT 8.0

Hi bwiec,

Did you get a chance to look at my model( Which was at the attachment)?


Neera.
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Xilinx Employee
Xilinx Employee
5,522 Views
Registered: ‎08-02-2011

Re: Help for FFT 8.0

Yes, and I realize I should have been more clear in my previous statement.

 

You still have to drive the inputs correctly depending on what you are trying to do. Study the "AXI4-Stream Considerations" section of the PG.

 

You are basically holding the FFT in a configuration state by tying everything high. You are also driving data_tlast incorrectly.

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Xilinx Employee
Xilinx Employee
5,508 Views
Registered: ‎11-28-2007

Re: Help for FFT 8.0

Take a look at the example in SysGen installaition directory below (replace 14.4 with your ISE version)

 

C:\Xilinx\14.4\ISE_DS\ISE\sysgen\examples\axi_designs\fft

 

Or take a look at the post below:

 

http://myfpgablog.blogspot.com/2011/03/fft-v80-axi-with-scaled-output.html

 

 

Cheers,
Jim
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Observer neera84
Observer
5,485 Views
Registered: ‎02-14-2013

Re: Help for FFT 8.0

Hi ,

 

Thank you for the reply.

 Now my design works well with FFT. At the final stage of my design, I need to have another FFT (with in same design). The there is a timing issue since the input to the second FFT is delayed it is not giving the correct result.(Which should be true in DFT alogorithem).

 

Can you tell me how to combine to FFTs? I am using 256 point FFT. 

 

Neera

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