03-25-2013 08:46 AM
Hi, I am new to Xilinx .
I have a signal (real and imaginary) and I want to take FFT of the signal using Xilinx FFT 8.0. I got the documentation of the block. But I am not clear about the input and output pins. Do I need to use every input pins and output pins? Is it OK to use termination blocks for the unused output pins.I only need real and imaginary output.
Could you kindly send me a sample implementation of FFT 8.0.( Simple one). I am confused with the pins.
03-25-2013 09:38 AM
03-25-2013 10:12 AM
03-25-2013 02:40 PM
Yes, and I realize I should have been more clear in my previous statement.
You still have to drive the inputs correctly depending on what you are trying to do. Study the "AXI4-Stream Considerations" section of the PG.
You are basically holding the FFT in a configuration state by tying everything high. You are also driving data_tlast incorrectly.
03-27-2013 09:54 PM
Take a look at the example in SysGen installaition directory below (replace 14.4 with your ISE version)
Or take a look at the post below:
04-11-2013 08:09 AM
Thank you for the reply.
Now my design works well with FFT. At the final stage of my design, I need to have another FFT (with in same design). The there is a timing issue since the input to the second FFT is delayed it is not giving the correct result.(Which should be true in DFT alogorithem).
Can you tell me how to combine to FFTs? I am using 256 point FFT.