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Adventurer
Adventurer
7,050 Views
Registered: ‎12-01-2010

How to temporarily disable System Monitor in Virtex-5?

Dear All,

 

We are doing some testing on Genesys board where a Virtex-5 core is soldered on. The test is likely to be impacted on the system monitor in the center die of the chip. In order to clarify this, we need to temporarily disable the system monitor since systme monitor is activated by default even if it is not instantiated into the desing by users. 

 

However, we have not found any way to disable it. The only mention in Xilixn official doucment is to:

 

"However, if the user chooses to disable System Monitor, this is

completed by connecting AVDD , VREFP , VREPN , and AVSS to ground reference. VP and VN

also should be connected to GND (see Figure 34 )."  But AVdd and Vrefp have been connected to 2.5V by default, so we cannot directly contect them to ground on the board.

 

It would be appreciating that anyone can provide us some hints for temporarily disable the "System monitor". We need to use it later, so shou;d not be permantly damaged.

 

Thanks,

Eric, 

Screen Shot 2015-11-06 at 12.00.47 pm.png

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1 Reply
Xilinx Employee
Xilinx Employee
7,007 Views
Registered: ‎10-11-2007

Re: How to temporarily disable System Monitor in Virtex-5?

It's not clear what it is exactly you are trying to accomplish and why you need SysMon to be "turned off".

 

Yes, Sysmon is operative even pre-configuration in "Safe Mode". Only way to turn it off is via grounding the supplies. But after configuration you could simply hold theSysMon in Reset if it's instantiated. But I don't know if that's sufficient for what you want to achieve.

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