06-06-2018 12:33 AM
There is a demo project for setting up Audio Codec on the Digilent Nexys Board (Artix-7) here. After running the .tcl for project creation there are several problems:
1- The project is not compatible with Vivado 2017.4. I solved its many issues after several tries.
2- There are 6 I2C ports in the MicroBlaze block design for talking to the codec, whereas there should be 2 ports; i.e. SDA & SCL.
When implementing design, BitGen fails for having no pin location for 6 I2C pins.
Why such an error exist and how should I handle it?
Note: I have designed an IO_BUF which connects 3 pins and makes an inout connection. One for SDA and one for SCL.
3- After bit file generation with mentioned workaround (Not sure it will work), hardware handoff is not generated by VIVADO.
I have to generate it using custom tcl commands found in the xilinx forum here.
4- After forcing export to SDK, the SDK fails to program the FPGA, and says that there is no "download.bit" file.
Ther does exist a bit file, namely "design_1.bit", but the SDK does not build "download.bit" by combining design_1.bit and application program!
Please help on resolving issues.
06-06-2018 01:15 AM
As a workaround for the 4th problem, I programmed the FPGA from Vivado, and just ran the application from SDK.
06-08-2018 03:20 AM
06-09-2018 09:48 PM
My issue is no longer very important, nonetheless I want to have a clean project, which runs without any issues.
I cannot export hardware directly to SDK; i.e. without custom TCL commands. If this could be managed, so that every thing is neat, it would be better.
Is there any way to resolve such issues?
06-10-2018 11:52 PM
I cannot export hardware directly to SDK; i.e. without custom TCL commands.
> Could you give details?
06-11-2018 02:29 PM - edited 06-11-2018 09:55 PM
After implementation, when I want to export hardware to SDK, Vivado complains that "The hardware handoff file (.sysdef) does not exist."
In order to remove this error, I have to manually generate .sysdef file using TCL commands, whenever I run synthesis.
06-12-2018 01:04 AM
Could you try to regenerate the BD output products? It might solve this issue
06-14-2018 02:05 AM
06-14-2018 02:07 AM
06-17-2018 10:45 AM