01-04-2010 09:23 PM
I'm interested in working out "Reconfiguration of FPGA using embedded System Approach". I have gone through the pdf file http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf. I have also noticed a design files along with it, I'm not much clear about what that design file represent and how it works. I also need to know how that design files have to be run.Is JTAG interface is the only configuration method that i can be used? Thank you.
01-04-2010 11:41 PM
the JTAG programming method is the most versatile one.
As can be seen in the FPGAs datasheet, there are several serial and parallel configuration methods.
You can use these too, from a microprocessor when the FPGA operates on the slave mode.
In this case you simply transfer the bitfile via the microprocessor to the FPGA and provide a clock or write strobe.
For the designfiles, are you refering to the C-codes in Appendix A and B of xapp058?
The first one is an application example which needs to be adapted to the I/O of your desired microprocessor system.
The second one is just a format converter, in case you need Intel HEX files for your programming system (The configuration data has to be stored somewhere).
This XAPP is quite generic, and if you are going to use it, ther's a lot of work to do from your side, since it will be just a small part of your microprocessor design, which is unknown to the authors of the application note.
Have a nice synthesis
01-05-2010 06:22 AM
Thank you.Yes i referred to Appendix A of xapp058. Should the design files micro.c, lenval.c,ports.c should be changed according to the microcontroller selected?For which microcontroller the codes written in appendix will be best suited with a mere change.
In JTAG programming method TMS,TCK have to be generated by a microcontroller, in such cases what are the conditions to be noted? In what rate the bits should be passed in TDI pin,is there any condition for it.
01-05-2010 11:13 PM
as far as I could see, only ports.c must be adapted to your systems needs. I haven't looked at the code, but I think it will be very much the same effort for any actual microcontroller.
The timing requirements for the JTAG interface can be found in the datasheet of your desired FPGA.
Have a nice synthesis