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Visitor mimrnx
Visitor
4,669 Views
Registered: ‎08-26-2016

Read Image File - Different Simulation results in ISim 13.2 and Vivado 2016.2

Hello,
I have written a simple test bench code in Verilog to read a "raw" image file and store the pixel values in a text file. I am getting different results when I simulate in Xilinx ISim 13.1 (x64) and Vivado 2016.2 (x64). Here's my code:


module test_image_read_write;

reg [7:0] InputImage [0:1023];

integer ReadPointer;
integer WritePointer;
integer i;

initial
begin
ReadPointer = $fopen("1.raw","rb+");
$fread(InputImage,ReadPointer);

WritePointer = $fopen("InputImageText.txt","wb+");

for(i = 0; i < 1024; i = i + 1)
begin
$fwrite(WritePointer,InputImage[i]);
$fwrite(WritePointer,",");
end

$fclose(WritePointer);
end

endmodule


The relevant files are attached. Can someone point out the reason for the different results ?

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1 Reply
Visitor mimrnx
Visitor
4,640 Views
Registered: ‎08-26-2016

Re: Read Image File - Different Simulation results in ISim 13.2 and Vivado 2016.2

I think it should have been posted under "Simulation and Verification." I did it mistakenly. Any moderators, please move the post to the relevant topic.

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