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Observer rnpatil
Observer
9,669 Views
Registered: ‎01-01-2009

Reading data From FPGA board via UART in MATLAB

I have generated Single Port Block Memory Core, with 64 byte data present in  .coe file. The .coe file contains 1 to 64 integer number. When tried to read the block memory contains in MATLAB via UART, in MATLAB array getting the numbers from 11 to 64 and then 1 to 10, instead of 1 to 64continuously. Kindly suggest the proper way to read the data. 

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12 Replies
Advisor eilert
Advisor
9,663 Views
Registered: ‎08-14-2007

Re: Reading data From FPGA board via UART in MATLAB

Hi,

this can have a number of causes.

 

How do you address the BRAM?

What OS and Hardware are you using?

(the serial object of Matlab does not work properly with all combinations)

 

What else is in your design but a UART and a BRAM?

 

Have a nice synthesis

  Eilert

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Observer rnpatil
Observer
9,654 Views
Registered: ‎01-01-2009

Re: Reading data From FPGA board via UART in MATLAB

Hello Eilert

Thankx for your reply, followings are the details about the design.

 

How do you address the BRAM?

 

signal my_addr_counter: std_logic_vector(5 downto 0);

 

add_gen_process : process (CLOCK)
begin
if (rising_edge(CLOCK)) then
my_addr_counter <= std_logic_vector( unsigned(my_addr_counter) + 1);
end if;
end process add_gen_process;

 

Memory_In : My_Memory
port map (
clka => CLOCK,
ena => '1',
wea => wea_null,
addra => my_addr_counter,
dina => dina_null,
douta => douta
);

 

What OS and Hardware are you using?

I am using Windows XP, and Matlab 2009 on my PC. And Spartan 6 FPGA (xc6slx45) ATLYS board.

 

What else is in your design but a UART and a BRAM?

I am just reading the data out from BRAM and feeding to UART. I just checking communication, after the successfull implementation of this I am going to process data out from BRAM and then the processed data will go to PC via UART.

 

Thankx

 

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Advisor eilert
Advisor
9,646 Views
Registered: ‎08-14-2007

Re: Reading data From FPGA board via UART in MATLAB

Hi,

since the ATLYS board has a USB-Serial converter on board the UART communication should work.

 

How do you prevent overrunning the UART FIFO?

What's the clock rate you are using for the address counter and BRAM?

 

Since your counter cycles through all adresses and the RAM gives the according data to the UART-TX it might be that you are overrunning the UART with data and so you just receive some funny undersampled pattern of the real data stream.

 

You should do a simple simulation of your design, to see the data coming from the RAM and what is sended by the UART-TX module. Also, take a look at the flags of your UART FIFO if there is one.

 

By the way, which UART (IP) are you using?

 

Have a nice synthesis

  Eilert

 

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Observer rnpatil
Observer
9,631 Views
Registered: ‎01-01-2009

Re: Reading data From FPGA board via UART in MATLAB

Hi

I tried to simulate the design to check to o/p from Block memory. While simulating, I removed the UART part. But while using both simulators which are available with me i.e. ISIM and ModelSim XE, both give o/p as follows

---------------------------------------

ISIM

---------------------------------------

In ISIM, it shows only first memory location contains, because, the following line which generates the address, I think not working. 

my_addr_counter <= std_logic_vector( unsigned(my_addr_counter) + 1);

ISIM gives me following warning, so my_addr_counter always remains to "xxxxxx"

 

at 5 ns(1), Instance /test_bram_mem/uut/Memory_In/U0/mem_module/ : Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).

 

---------------------------------------

ModelSim XE III/Starter

---------------------------------------

ModelSim is not going to find file xilinxcorelib.blk_mem_gen_v4_3.vhd, which is compatible to it.

 

# -- Compiling architecture my_memory_a of my_memory
# ** Error: (vcom-11) Could not find xilinxcorelib.blk_mem_gen_v4_3.
# ** Error: ipcore_dir/my_memory.vhd(66): (vcom-1195) Cannot find expanded name "xilinxcorelib.blk_mem_gen_v4_3".

---------------------------------------------------------------------------------------------------------

Can you suggest me any other way to check or where I can get the xilinxcorelib.blk_mem_gen_v4_3.vhd compatible for ModelSim XE III (I didn't find it on xilinx.com). Kindly give me guideline.

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Teacher rcingham
Teacher
9,625 Views
Registered: ‎09-09-2010

Re: Reading data From FPGA board via UART in MATLAB

Regarding the ISim problem, how do you think are you initialising 'my_addr_counter'?
Probably you aren't, so need to do it in the signal declaration.

------------------------------------------
"If it don't work in simulation, it won't work on the board."
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Observer rnpatil
Observer
9,621 Views
Registered: ‎01-01-2009

Re: Reading data From FPGA board via UART in MATLAB

Yes, you are correct, I have not initialized it, now I am getting it in sequence in simulation (ISIM) only.

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Advisor eilert
Advisor
9,586 Views
Registered: ‎08-14-2007

Re: Reading data From FPGA board via UART in MATLAB

Hi,

about Modelsim XE III/Starter:

Have you recompiled the Xilinx libraries (especially XilinxCorelib) for your actual ISE version?

 

Have a nice simulation

  Eilert

 

 

 

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Observer rnpatil
Observer
9,581 Views
Registered: ‎01-01-2009

Re: Reading data From FPGA board via UART in MATLAB

Hi

Earlier I was using Xilinx 9.2, and the ModelSim which I installed at that time, using the same for 12.3 also. 

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Advisor eilert
Advisor
9,580 Views
Registered: ‎08-14-2007

Re: Reading data From FPGA board via UART in MATLAB

Hi,

then you should definitely compile the xilinx libraries that came with ISE12.3 for Modelsim.

You can do that in a different directory, so you can still use the old libs with ISE 9.x if necessary.

 

 

Have a nice synthesis

  Eilert

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Observer rnpatil
Observer
3,570 Views
Registered: ‎01-01-2009

Re: Reading data From FPGA board via UART in MATLAB

Hello

Can you pl. tell, how to compile all lib files for ModelSim, in one shot for ISE 12.3?

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Advisor eilert
Advisor
3,559 Views
Registered: ‎08-14-2007

Re: Reading data From FPGA board via UART in MATLAB

hi,

xilinx provides the compxlib skript for this purpose.

It can be called from the commandline (as compxlibgui with a graphical interface) or directly from ISE project manager.

Probably found under Misc. Tools somewhere.

 

You can find a lot of threads about it in the forum and ARs if problems arise.

 

Have a nice simulation

  Eilert

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Observer anjali_apex
Observer
334 Views
Registered: ‎05-01-2019

Re: Reading data From FPGA board via UART in MATLAB

Hello

I was doing the same thing as this, reading from the coe file uploaded in true dual port BRAM.

I am able to read it but when I make the frequency of uart and data acquisition different then it is starting from some random address.

Can you give some suggestions to rectify this?

 

Thanks

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