Reg: ADC (XPS Delta-Sigma ADC) in EDK-SPARTAN6-LX9
Am using SPARTAN6-LX9 FPGA and trying to add an ADC to my system (microblaze-PLB). Also am using Xilinx 13.2-embedded edition. I found the ADC/DAC cores in the IP catalog. While going through the architecture of the ADC core I found that the analog input gets compared to a deltasigma 1 bit DAC output (built-in) and that also DAC output passes through a lowpass filter(RC).
If I want to use the core, should I implement a comparator and a RC filter(low pass) externally (FPGA-MICROBLAZE)???
Else should I go for the PMODS (PmodAD1 - Digilent). Hope I would have to inplement a SPI communication to use the PMOD!!!
Could anyone provide me a solution to start up with?