03-25-2011 03:57 AM
Hi,
I want to interface an ADC with virtex 6, but I don't know if the interface SPI voltage is the same for both
my ADC is the AD9230. Tanks
04-05-2011 10:38 AM
@rekkath wrote:
in the datasheet of the AD9230 (page 5) I saw that the voltage level for logic 1 voltage is 0.8xVDD min I want to know what is the maximum voltage level.
The maximum voltage is equal to the supply rail voltage.
the same a logic 0 voltage is 0.2xVDD max, what is the voltage level min
Also set by the supply rails -- in this case, the lower level is 0V or ground. This stuff is all Digital Electronics 101 -- as basic as can be.
The SPI device must support I/Os of 2.5V or lower. Is there lower limit?
thank you
Read the fscking manuals. The FPGA supports several I/O voltage standards. 1.8V and 1.2V are lower than 2.5V. What you choose depends on what supplies are available and what other I/O requires. It's called "engineering."PS: text formatting with this forum REALLY SUCKS.
03-25-2011 04:44 AM - edited 03-25-2011 04:51 AM
AD9230 uses a nominal 1.8V supply, with LVDS output levels. The SPI interface IO levels are listed in the device datasheet. Virtex 6 should have no problem with this.
You really should take a look at page 5 of the AD9230 datasheet. Have you taken a look at the datasheet yet?
-- Bob Elkind
03-26-2011 06:13 AM
SPI is a format, not a voltage level.
The DAC will have IO voltage requirments, and the virtex 6 can support different IO voltages, dependent how you have it wired up and configured.
look at the data sheet for the dac, find out what IO voltages you need,
look in the xilinx data sheet to select which IO standard meets that,
and configre the virtex accordingly.
03-28-2011 12:32 AM
Hi,
thanks for your answer . Indeed I read the datasheet, but I just reread it and I find the information at Logic inputs voltage
Thanks
03-28-2011 12:35 AM
Indeed I read the datasheet, but I just reread it and I find the information at Logic inputs voltage
Well done!
-- Bob Elkind
03-28-2011 02:51 AM
well done,
it's one of those things that has gone out of favour, IO voltages / thresholds, setup and hold times.
most things just seem to work , evey thing was 3v3,
but i[ts always a ggod idea to check.
it's amazing the proliferation of voltage standards.
I reckon we should standadise all digital IO at 0v9, hows that for a radical thought.,
03-28-2011 02:59 AM
it's amazing the proliferation of voltage standards.
well, yes... the Virtex-6 family parts are (nominally) not 3.3V IO tolerant.
-- Bob Elkind
04-05-2011 02:39 AM
Hi eteam,
04-05-2011 03:59 AM
in the datasheet of the AD9230 (page 5) I saw that the voltage level for logic 1 voltage is 0.8xVDD min I want to know what is the maximum voltage level. the same a logic 0 voltage is 0.2xVDD max, what is the voltage level min
You are referring to the input voltage, not output voltage. AD9230 Vdd is 1.8V. This makes VIN(low) = 360mV and VIN(high) = 1.44V.
Compare this to the Virtex-6 datasheet specifications (Table 7, LVCMOS25): VOUT(low) = 400mV and VOUT(high) = 1.4V
Conclusion: Virtex-6 is not able to directly drive AD9230. You will need a buffer.
Here is an example buffer which should work, either for driving from V-6 to AD9230 or receiving from AD9230 to V-6. There are many similar buffers which will work, this is one which I picked for low cost, small size, and acceptable speed. It is a 3-state device which should work for the bidirectional SDIO signal.
The SPI device must support I/Os of 2.5V or lower. Is there a lower limit?
The only lower limit for IO voltage swings is what the various devices will support. The AD9230 is a 1.8V device. It cannot accept lower voltage swings, nor can it sustain higher voltages (for example 2.5V).
I hope this helps... Bonne chances.
-- Bob Elkind
04-05-2011 10:38 AM
@rekkath wrote:
in the datasheet of the AD9230 (page 5) I saw that the voltage level for logic 1 voltage is 0.8xVDD min I want to know what is the maximum voltage level.
The maximum voltage is equal to the supply rail voltage.
the same a logic 0 voltage is 0.2xVDD max, what is the voltage level min
Also set by the supply rails -- in this case, the lower level is 0V or ground. This stuff is all Digital Electronics 101 -- as basic as can be.
The SPI device must support I/Os of 2.5V or lower. Is there lower limit?
thank you
Read the fscking manuals. The FPGA supports several I/O voltage standards. 1.8V and 1.2V are lower than 2.5V. What you choose depends on what supplies are available and what other I/O requires. It's called "engineering."PS: text formatting with this forum REALLY SUCKS.
04-07-2011 02:38 AM
04-07-2011 02:39 AM
hi
thanks so much
have a nice day