UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor dmitrip
Visitor
8,949 Views
Registered: ‎03-08-2011

understanding GMACS and DSP slices

Jump to solution

Hello,  

 

I notice that "DSP throughput (symmetric filter)" is given in units of GMACS for the Virtex-7 family (up to 6,737 GMACS) (here: http://www.xilinx.com/products/silicon-devices/fpga/virtex-7/index.htm).  Multiplication and accumulation is great, but could someone help me understand what operations are being counted?  I see that the Virtex-7's have a few thousand DSP slices, but I'm not sure what Xilinx has in mind to get that performance (apparently not 1 MAC per DSP slice per clock cycle).

 

I would like to do digital filtering in single or double precision, probably using a xilinx floating-point core, and would like to understand how many multiply accumulate operations I can get out of a given board.  

 

Thanks

0 Kudos
1 Solution

Accepted Solutions
Xilinx Employee
Xilinx Employee
11,584 Views
Registered: ‎11-28-2007

Re: understanding GMACS and DSP slices

Jump to solution

GMACS = Giga MAC per second, so it also depends on the clock frequency DSP block is operating at. Each DSP48 block in Virtex7 has a pre-adder in it, so it can do two MAC's ((A+D)*B) per clock cycle. The Fmax of DSP48 block in Virtex7 is 638MHz (-3 speed grade), so here is how 6737GMACS is calculated:

 

Max GMACS = 5280 DSPs * 638MHz * 2 = 6737 GMACs

 

 


@dmitrip wrote:

Hello,  

 

I notice that "DSP throughput (symmetric filter)" is given in units of GMACS for the Virtex-7 family (up to 6,737 GMACS) (here: http://www.xilinx.com/products/silicon-devices/fpga/virtex-7/index.htm).  Multiplication and accumulation is great, but could someone help me understand what operations are being counted?  I see that the Virtex-7's have a few thousand DSP slices, but I'm not sure what Xilinx has in mind to get that performance (apparently not 1 MAC per DSP slice per clock cycle).

 

I would like to do digital filtering in single or double precision, probably using a xilinx floating-point core, and would like to understand how many multiply accumulate operations I can get out of a given board.  

 

Thanks


 

Cheers,
Jim
2 Replies
Xilinx Employee
Xilinx Employee
11,585 Views
Registered: ‎11-28-2007

Re: understanding GMACS and DSP slices

Jump to solution

GMACS = Giga MAC per second, so it also depends on the clock frequency DSP block is operating at. Each DSP48 block in Virtex7 has a pre-adder in it, so it can do two MAC's ((A+D)*B) per clock cycle. The Fmax of DSP48 block in Virtex7 is 638MHz (-3 speed grade), so here is how 6737GMACS is calculated:

 

Max GMACS = 5280 DSPs * 638MHz * 2 = 6737 GMACs

 

 


@dmitrip wrote:

Hello,  

 

I notice that "DSP throughput (symmetric filter)" is given in units of GMACS for the Virtex-7 family (up to 6,737 GMACS) (here: http://www.xilinx.com/products/silicon-devices/fpga/virtex-7/index.htm).  Multiplication and accumulation is great, but could someone help me understand what operations are being counted?  I see that the Virtex-7's have a few thousand DSP slices, but I'm not sure what Xilinx has in mind to get that performance (apparently not 1 MAC per DSP slice per clock cycle).

 

I would like to do digital filtering in single or double precision, probably using a xilinx floating-point core, and would like to understand how many multiply accumulate operations I can get out of a given board.  

 

Thanks


 

Cheers,
Jim
Explorer
Explorer
1,851 Views
Registered: ‎07-09-2014

Re: understanding GMACS and DSP slices

Jump to solution
Hi ywu,

May I know what specific chip are you talking about?
And May I know the precision of the MAC operation in this context?

Thanks & Best Regards,
southernduck
0 Kudos