| New | Title | Recent Message Time Column | |
|---|---|---|---|
|
Discuss topics on PCI Express, XDMA and QDMA, and the Versal CPM block.
Latest Topic -
| |||
|
Discuss Topics on Xilinx FPGA and ARM Processor System Ethernet IP and associated SW stack.
Latest Topic -
| |||
|
Discuss Video Processing and Connectivity IP – HDMI, DisplayPort, UHD-SDI, Video Processing Subsystem, VCU, and more.
Latest Topic -
| |||
|
Discuss transceiver and transceiver wizard related topics.
Latest Topic -
| |||
|
Discuss MIG GUI,DDR4, QDRIV,DDR3,DDR2,DDRII, RLDRAM,QDR,QDRII, LPDDR2 and LPDDR3, MCB, HBM Controller, and related topics.
Latest Topic -
| |||
|
Discuss AI Engine, System Generator, Model Composer, and Digital Signal Processing Ips such as Modulations, Filters, Transforms, Wireless (DPD, PC-CFR), Error Correction, and more.
Latest Topic -
| |||
|
Discuss Processor system design for Versal, Zynq UltraScale+ MPSoC/RFSoC, Zynq-7000, MicroBlaze, and PicoBlaze. Includes both Processor Subsystem (PS) peripherals that are not covered by other boards such as Interrupts, UART, PS-SPI, USB, SATA, DDR, I2C, UART, CAN, CAN-FD, RTC, and GPIO.
Latest Topic -
| |||
|
A board to discuss topics on Versal, Kintex UltraScale, Virtex UltraScale, Kintex UltraScale+, Virtex UltraScale+, Zynq UltraScale+ MPSoC, and Zynq UltraScale+ RFSoC including Device Architecture, Clocking, SelectIO, Signal Integrity, Packaging, Power, Data Converters and related topics. This board excludes the Processor Subsystem (PS) and Embedded specific topics which are covered in the other forums.
Latest Topic -
| |||
|
Discuss board bring-up, boot and configuration topics for Versal, Zynq-7000, Zynq UltraScale+ MPSoC and MicroBlaze based FPGA designs. Topics include secure and non-secure boot flow including programming the boot device (QSPI, JTAG, SD eMMC, NAND, NOR), bootrom, FSBL, loading of the bitstream, fallback/multi-boot, programming of eFUSEs and BBRAM.
Latest Topic -
| |||
|
A board to discuss topics on Artix™-7, Kintex™-7, Spartan™-7, Virtex®-7, Virtex® Family FPGAs and Spartan® Family FPGAs including Zynq-7000 SoCs including device architecture, clocking, SelectIO, signal integrity, packaging, power, and related topics. This board excludes the Processor Subsystem (PS) and Embedded specific topics which are covered in the Embedded forums.
Latest Topic -
| |||
|
Discuss Configuration related topics including JTAG, SPI, BPI, SelectMap, eFUSE, SEM IP, Programming cables, Tandem, iMPACT, and Vivado Device Programmer software related topics. Boot for Versal, Zynq Ultrascale+ and Zynq-7000 is not covered here.
Latest Topic -
| |||
|
Discuss Xilinx evaluation boards, kits, FMC daughter-cards, and reference designs.
Latest Topic -
| |||
|
Discuss IP and tools including Chipscope, Integrated Logic Analyzer (ILA), IBERT, VIO, XPE and Power Estimation tools, and others.
Latest Topic -
| |||
|
Discuss Topics on all Xilinx IP not included on other boards like BRAM/FIFO, Distributed Logic Generator, ECC, Xilinx Parameterized Macro (XPMs) , CPRI and JESD.
Latest Topic -
|
