04-07-2021 12:00 PM
Hello,
I am new to Vitis/ Vivado HLS. I came across the pipeline pragma directive and saw the rewind option. But I am not able to understand the difference between a pipeline with rewind and a pipeline without rewind. Could someone please explain the difference between the two with an example.
Thank you!
04-07-2021 12:06 PM
This is what the UG871 has to say about rewind:
When the top-level of the design is a loop, you can use the pipeline rewind option. This informs Vivado HLS that when implemented in RTL, this loop runs continuously (with no end of function and function re-start cycles).
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04-07-2021 12:06 PM
This is what the UG871 has to say about rewind:
When the top-level of the design is a loop, you can use the pipeline rewind option. This informs Vivado HLS that when implemented in RTL, this loop runs continuously (with no end of function and function re-start cycles).
------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem