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gvirbila

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10-22-2019 04:58 PM

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Registered:
07-01-2013

Does anyone have an example for using the HLS SSR FFT (ug902 v2019.1)?

Gabriel

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fguy

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11-01-2019 07:26 AM

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06-06-2014

The hope remains that the next reincarnation of this IP will be more adequate.

12 Replies

fguy

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10-23-2019 04:21 AM

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06-06-2014

wenchen

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10-24-2019 07:25 PM

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05-27-2018

In UG902 V2019.1,page 245，It is clearly stated that the recommended starting point is to start with float/double inner type in std::complex<> and verify the SNR against a reference model, such as the Matlab/Python/Octave/Simulink – whichever modeling language or tools are used by generating golden test vectors. The synthesizable version of the SSR FFT currently only supports ap_fixed<> inner type, so the next step is to start experimenting with a fixed point model.

The FFT cannot be used in a region which is pipelined. If high-performance operation is required, pipeline the loops or functions before and after the FFT then use dataflow optimization on all loops and functions in the region. If you have to use the float tpye, consider the FFT lP Library instead of SSR FFT.

Thanks,

Wen

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如果提供的信息能解决您的问题，请标记为“接受为解决方案”。

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fguy

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10-25-2019 02:44 AM

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06-06-2014

gvirbila

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10-28-2019 03:42 PM

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Registered:
07-01-2013

I have made some progress but am having trouble instantiating a SSR FFT module. UG902 v2019.1, pg. 249 states that the FFT should be called as follows:

hls::ssr_fft::fft<ssr_fft_params>(inD,outD);

after I have set the ssr_fft_params based on the extended struct, ssr_fft_default_params. At this point, HLS complains of an invalid overload. I have dug somewhat throught hls_ssr_fft.h file but am still at a loss.

What is the correct instantiation?

fguy

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10-29-2019 01:03 AM

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06-06-2014

gvirbila

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10-29-2019 05:14 PM

1,486 Views

Registered:
07-01-2013

Hey fguy,

I have looked at the example you recommened but cannot for the life me make the SSR FFT work. Do you have an example line of code for instantiation and calling of the module?

Gabriel

fguy

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10-30-2019 02:13 AM

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Registered:
06-06-2014

fguy

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11-01-2019 07:26 AM

1,436 Views

Registered:
06-06-2014

The hope remains that the next reincarnation of this IP will be more adequate.

fguy

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11-20-2019 03:41 AM - edited 11-20-2019 03:42 AM

1,286 Views

Registered:
06-06-2014

OOPS!!!

The IP SSR FFT has moved to the Vitis library and now, according to the documentation and examples, now supports the complex float data type. Is it possible to synthesize the current version using HLS and get an IP for Vivado?

gvirbila

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11-20-2019 09:14 AM

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Registered:
07-01-2013

Interesting... Can you point me in the right direction? I have not used Vitis before.

Gabriel

fguy

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11-20-2019 12:58 PM

1,236 Views

Registered:
06-06-2014

The source code for Vitis has much in common with HLS - perhaps they can also be adapted to form regular IPs for Vivado. I would like to hear from Xilinx experts about this.

baileyji

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01-03-2020 01:00 PM

1,064 Views

Registered:
02-20-2019