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Observer
Observer
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Registered: ‎08-04-2016

How do I generate a pcore to use in planAhead while using axi and bram

After finishing and synthesizing my design and finishing all the co-simulation steps, I wanted to generate a pcore for EDK so I can integrate my design to a bigger design on planAhead. 

However, I face this error :

 

@E [IMPL-103] Native AXI or BRAM interfaces are not supported during export format 'pcore'.
command 'ap_source' returned error code

Is there anyway to go around this? like generating a VDHL ip core, and rebuilding it as an EDK pcore?

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