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Teacher xilinxacct
Teacher
659 Views
Registered: ‎10-23-2018

RANDOM SYNCHK errors in HLS coding examples

There appears to be a random (or carryover) effect when trying to synthesize the ‘coding example’ files provided by Xilinx

Using both versions 2018.2 & 2018.3 on Windows 10, seem to have the same issue. (Used both default target device and xczu3eg-sbva484-1-e)

Sometimes the examples synthesize with an error, but the same design, with no code change (e.g. just synthesize again, fails OR succeeds). Once it succeeds, it seems less likely to fail on subsequent attempts.

Here are a few examples that show it ‘failing’

array_RAM example does not pass synthesis check
ERROR: [SYNCHK 200-61] array_RAM.c:98: unsupported memory access on variable 'idx' which is (or contains) an array with
unknown size at compile time. proj_array_RAM:solution1 Jan 10, 2019 10:44:04 AM

proj_loop_functions
ERROR: [SYNCHK 200-61] loop_functions.c:99: unsupported memory access on variable 'I' which is (or contains) an array
with unknown size at compile time. proj_loop_functions:solution1 Jan 10, 2019 10:44:54 AM

proj_malloc_removed
ERROR: [SYNCHK 200-61] malloc_removed.c:111: unsupported memory access on variable 'din' which is (or contains) an
array with unknown size at compile time. proj_malloc_removed:solution1 Jan 10, 2019 10:05:23 AM

Any ideas? Anybody else gets these types of errors sporadically?

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8 Replies
Teacher xilinxacct
Teacher
631 Views
Registered: ‎10-23-2018

Re: RANDOM SYNCHK errors in HLS coding examples

another RANDOM failure case...
ERROR: [SYNCHK 200-61] loop_imperfect.c:102: unsupported memory access on variable 'A' which is (or contains) an array
with unknown size at compile time. proj_loop_imperfect:solution1 Jan 10, 2019, 1:43:01 PM

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Moderator
Moderator
626 Views
Registered: ‎10-04-2011

Re: RANDOM SYNCHK errors in HLS coding examples

 Hello @xilinxacct,

 

I haven't seen these intermittent errors myself, and there are no mention of prior issues in our bug database, so I welcome the input from the community on this.

Taking a guess at the example designs from the code file names, the first looks to be the Array Ram example. Given that, the code is:

void array_RAM (dout_t d_o[4], din_t d_i[4], didx_t idx[4]) {
	int i;
	For_Loop: for (i=0;i<4;i++) {
		d_o[i] = d_i[idx[i]];
	}
}

Here the idx array size is explicitly defined, so there should be no basis for that error. Since memory must be instantiated by HLS, or interfaced with if external to the HLS IP, we need to know the size to create the appropriate components and signals. This error is meant to indicate that isn't possible due to unknown array size. But as I mentioned, that does not apply here. Also, I attempted this design multiple times in windows 10 and did not get the error. 

Maybe it is a system issue like stale processes interfering, or conflicting GCC/CLANG compiler versions if you installed CYGWIN or similar? Also, the version of Vivado can matter compiler wise, so ensure Windows 10 matches the 2018.3 requirements of:

Windows 10.0 1803 update, 10.0 1809 Update (64-bit), English/Japanese

Maybe the final thing to suggest is that when this fails, zip the entire directory up, and I can take a look at the files produced to see what it may be? 

OK, sorry I do not have a definitive answer here, but I hope this helps,
Scott

 

 

 

 

 

 

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Moderator
Moderator
625 Views
Registered: ‎10-04-2011

Re: RANDOM SYNCHK errors in HLS coding examples

I should add one more test to help isolate if this is just your machine and its setup is to have a colleague try this out if possible, or another machine / OS of yours if available. If that is possible, can you let us know how that turns out?

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Teacher xilinxacct
Teacher
611 Views
Registered: ‎10-23-2018

Re: RANDOM SYNCHK errors in HLS coding examples

@scampbell

Thanks for your reply...

As for windows version... 2019-01 Cumulative Update for Windows 10 Version 1803 for x64-based Systems (KB4480966) (English)

No Cygwin, Clang, or GCC install in Windows by me.

I have not changed the files, so the example files that go with the release, are the source.

The steps I did to get the failures were...

1) Run Vivado HLS

2) Open an example file

3) synthesize it

4) close the project

5) Repeat from step #2... when I got the the RAM example, that was the first failure... see that the error made no sense to me, I re-ran the synthesis and it succeeded.

** continued in that pattern

It is a weird one, as it seems to get 'better' (meaning fails less often, once it achieves success). I will reboot, and watch for further repeats.

Thanks

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Teacher xilinxacct
Teacher
598 Views
Registered: ‎10-23-2018

Re: RANDOM SYNCHK errors in HLS coding examples

@scampbell

Bad news... even after the reboot some other random SYNCH errors continue... this time in the 'design examples folder... first attempt failed, then without code change (just re-synthesize) it completed.

memory_porting_and_ii
ERROR: [SYNCHK 200-61] matrixmul.cpp:112: unsupported memory access on variable 'res' which is (or contains) an array with unknown size at compile time.
INFO: [SYNCHK 200-10] 1 error(s), 0 warning(s).
ERROR: [HLS 200-70] Synthesizability check failed.

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Teacher xilinxacct
Teacher
587 Views
Registered: ‎10-23-2018

Re: RANDOM SYNCHK errors in HLS coding examples

@scampbell

A variation on the theme... more in the 'design examples' folder...

These were seemingly not going to succeed... I moved on... Then went back and reopened the projects, re-synthesized, and then they succeeded.

viterbi_decoder
11 errors generated.
Compilation of the preprocessed source 'viterbi_decoder' failed

fft_ifft
2 errors generated.
Compilation of the preprocessed source 'fft_top' failed

fxp_sqrt
1 error generated.
Compilation of the preprocessed source 'fxp_sqrt_top' failed

hls_stream
6 errors generated.
Compilation of the preprocessed source 'bytestrm_dwordproc' failed

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Teacher xilinxacct
Teacher
311 Views
Registered: ‎10-23-2018

Re: RANDOM SYNCHK errors in HLS coding examples

@scampbell

One more clue.... using ap_int.h seems to make it happen more often... Was doing some code that had no ap stuff, never saw it... Included the header and changed a return value to use ap_unit<4> and then it failed about 5 times in a row, then finally succeeded.

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Voyager
Voyager
177 Views
Registered: ‎03-28-2016

Re: RANDOM SYNCHK errors in HLS coding examples

I get the same behavior when I try to synthesize the SVD example.  Sometimes it will compile. Sometimes I get the following error message:

ERROR: [SYNCHK 200-61] svd.cpp:49: unsupported memory access on variable 'A' which is (or contains) an array with unknown size at compile time.

I have attached a zip of the failing SVD project.

Ted Booth - Tech. Lead FPGA Design Engineer
www.designlinxhs.com
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