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Observer
Observer
6,796 Views
Registered: ‎07-29-2015

Set ports on AXI LITE interface

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I managed to generate an IP block with HLS using the AXI Lite interface. I then desigend a microblaze system with all the other components. Now I'd like "call" my HLS block from the microblaze processor using C. However, it seems that i cannot really set the ports of my HLS block. Since I'm not sure if my HLS port definitions are correct, I decided to post this here. But maybe my calling C code is just wrong.

 

I used HLS to generate an IP block with the following interface definiton:

#define dim 2

float dummy_algorithm(float const pX[dim], float const pY, bool const pPredict, bool const pReset) {
DO_PRAGMA(HLS INTERFACE s_axilite port=pX depth=dim);
#pragma HLS INTERFACE s_axilite port=pY
#pragma HLS INTERFACE s_axilite port=pPredict
#pragma HLS INTERFACE s_axilite port=pReset
#pragma HLS INTERFACE s_axilite port=return

// Actual code...

}

With the help of ug871 (http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_1/ug871-vivado-high-level-synthesis-tutorial.pdf) I managed to come up with this code:

XDummy_algorithm perceptron; 
//.. more code
xil_printf("Initialize Perceptron instance...\n\r"); XDummy_algorithm_Config *cfg; cfg = XDummy_algorithm_LookupConfig(XPAR_DUMMY_ALGORITHM_0_DEVICE_ID); if (!cfg) { xil_printf("Error: lookup of perceptron IP failed!\n\r"); return -4; } int status = XDummy_algorithm_CfgInitialize(&perceptron,cfg); if (status != XST_SUCCESS) { xil_printf("Error: could not initialize perceptron IP! \n\r;"); return -5; } XDummy_algorithm_InterruptGlobalDisable(&perceptron); XDummy_algorithm_Set_pReset(&perceptron,1); u32 t1 = XDummy_algorithm_Get_pReset(&perceptron); unsigned char *temp = (unsigned char *) &t1; xil_printf("t1 = %x - %x - %x - %x \n\r", temp[0], temp[1], temp[2], temp[3]); u32 t2 = XDummy_algorithm_Get_pReset(&perceptron); xil_printf("t2 = %d\n\r", t2); xil_printf("done\n\r");

The output is:

Initialize Perceptron instance...
t1 = 0 - 0 - 0 - 0
t2 = 0

So you see, the port seems to be 0 rather than 1.  What am I missing here?

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Highlighted
Observer
Observer
12,955 Views
Registered: ‎07-29-2015

Seems like something in my workspace was messed up or so. After moving HLS files and Vivado synthesis files to a new workspace and re-run bitstream generation the ports are correctly assigned now.

View solution in original post

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Highlighted
Observer
Observer
12,956 Views
Registered: ‎07-29-2015

Seems like something in my workspace was messed up or so. After moving HLS files and Vivado synthesis files to a new workspace and re-run bitstream generation the ports are correctly assigned now.

View solution in original post

0 Kudos