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Visitor
Visitor
7,735 Views
Registered: ‎01-27-2014

UDP Packet Processing example

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Hi,

 

I'm currently collecting control centric applications that can be synthesized by Vivado. In the "Introduction to FPGA Design with Vivado HLS"[1] script i found example code taken of an UDP packet processing implementation. Is the code partialy used there, availabe in complete version as opensource or within an AppNote or example provided by Xilinx?

 

 

[1] http://www.xilinx.com/support/documentation/sw_manuals/ug998-vivado-intro-fpga-design-hls.pdf pages 55-59

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Moderator
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Registered: ‎04-17-2011
There is no AppNote in HLS which talks about this.http://www.xilinx.com/products/design-tools/vivado/integration/esl-design.html Looks to be an example to describe the tool utility.
Regards,
Debraj
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Moderator
Moderator
11,615 Views
Registered: ‎04-17-2011
There is no AppNote in HLS which talks about this.http://www.xilinx.com/products/design-tools/vivado/integration/esl-design.html Looks to be an example to describe the tool utility.
Regards,
Debraj
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Visitor
Visitor
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Registered: ‎01-27-2014

It is an example for describing fsm behaviour in hls code for control centric applications. It would make a nice full example on how to implement such behavior and what will be the synthesized results.

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