01-27-2014 05:14 AM
Hi,
I'm currently collecting control centric applications that can be synthesized by Vivado. In the "Introduction to FPGA Design with Vivado HLS"[1] script i found example code taken of an UDP packet processing implementation. Is the code partialy used there, availabe in complete version as opensource or within an AppNote or example provided by Xilinx?
[1] http://www.xilinx.com/support/documentation/sw_manuals/ug998-vivado-intro-fpga-design-hls.pdf pages 55-59
01-27-2014 10:16 PM
01-27-2014 10:16 PM
01-29-2014 06:40 AM
It is an example for describing fsm behaviour in hls code for control centric applications. It would make a nice full example on how to implement such behavior and what will be the synthesized results.