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pedro_uno
Advisor
Advisor
346 Views
Registered: ‎02-12-2013

Vitis HLS exported core not visible in IP Catalog

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Hello,

I'm trying to use Vitis HLS to synthesize an IIR filter for use in Vivado.  In Vivado HLS I could export as IP from HLS then add the repository to Vivado IP Catalog.  Then I could generate a core to make an .xci file.

In Vitis HLS I try to do the same but the core is not visible in the IP Catalog after I add the repository.  Is there something different I need to do in Vitis HLS?

When I add the repository the IP (iir) is visible.

Screenshot from 2021-07-20 16-29-02.png

But when I go to use it from the IP Catalog it is not visible.

Screenshot from 2021-07-20 16-27-53.png

Any ideas?

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DSP in hardware and software
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1 Solution

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randyh
Xilinx Employee
Xilinx Employee
315 Views
Registered: ‎01-04-2013

It basically works the same way in Vitis HLS. Here I have added an IP to the repository as shown in one image:

ip_repo.png

but it shows up as hidden or disabled as seen in the next image (it can be hidden or disabled for any number of reasons, first of which it is not designed for the device you are targeting):

ip_catalog.png

View solution in original post

2 Replies
randyh
Xilinx Employee
Xilinx Employee
316 Views
Registered: ‎01-04-2013

It basically works the same way in Vitis HLS. Here I have added an IP to the repository as shown in one image:

ip_repo.png

but it shows up as hidden or disabled as seen in the next image (it can be hidden or disabled for any number of reasons, first of which it is not designed for the device you are targeting):

ip_catalog.png

View solution in original post

pedro_uno
Advisor
Advisor
270 Views
Registered: ‎02-12-2013

OK, good work. That was exactly my mistake. In my Vivado setup script I am using an XC7a35

set_property part xc7a35ticsg324-1L [current_project]

but in my Vitis HLS build script I had it set to an XCZU3eg.   The following change makes it work. Thanks

#set_part {xczu3eg-sfva625-1-i}
set_part {xc7a35ticsg324-1L}

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DSP in hardware and software
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