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Contributor
Contributor
170 Views
Registered: ‎04-29-2020

Vivado-HLS 2020.1 Generating RTL for module generate error: Abnormal program termination (EXCEPTION_ACCESS_VIOLATION)

csim passed, but generate rtl failed. attacheed zip file is the project

thank you!

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Voyager
Voyager
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Registered: ‎06-20-2012

Your design compile on version 2018.3.

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Contributor
Contributor
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Registered: ‎04-29-2020

The project use Vivado 2020.1 and win10 x64
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