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Xilinx Employee
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Registered: ‎03-19-2013

George Wang (王宏强) – Xilinx DSP Specialist

1. 编码风格

1.1      单双精度浮点数学函数

#include <math.h>

float example(float var)

{

return log(var); // 双精度自然对数

}

#include <math.h>

float example(float var)

{

return logf(var); // 单精度自然对数

}

1.2      浮点运算优化

void example(float *m0, float *m1, float *m2, float var)

{

*m0 = 0.2 * var; // 双精度浮点乘法，单双精度类型转换

*m1 = 0.2f * var; // 单精度浮点乘法

*m2 = var / 20.0f; // 单精度浮点除法

}

void example(float *m0, float *m1, float var)

{

*m0 = 0.2f * 5.0f * var; // *m0 = var;常数乘法被优化掉

*m1 = 0.2f * var * 5.0f; // 两个双精度浮点乘法

}

void example(float *m0, float *m1, float var)

{

*m0 = 0.5 * var; //

*m1 = var/2; //

}

1. 并行度与资源复用

void example(float *r, float a, float b,

float c, float d)

{

*r = a + b + c + d;

}

void example(float *r, float a, float b,

float c, float d)

{

#pragma HLS PIPELINE

*r = a + b + c + d;

}

void example (float *r, float a, float b,

float c, float d)

{

#pragma HLS PIPELINE

float e, f;

e = a + b;

f = c + d;

*r = e + f;

}

void example(float r0[32], float a[32], float b[32])

{

#pragma HLS interface ap_fifo port=a,b,r0

#pragma HLS array_reshape cyclic factor=2 variable=a,b,r0

for (int i = 0; i < 32; i++)

{

#pragma HLS pipeline

#pragma HLS unroll factor=2

r0[i] = a[i] + b[i];

}

float example(float x[32])

{

#pragma HLS interface ap_fifo port=x

float acc = 0;

for (int i = 0; i < 32; i++)

{

#pragma HLS pipeline

acc += x[i];

}

return acc;

}

float top(float x[32])

{

#pragma HLS interface ap_fifo port=x

float acc_part[4] = {0.0f, 0.0f, 0.0f, 0.0f};

for (int i = 0; i < 32; i += 4) { // 手动unroll by 4

for (int j = 0; j < 4; j++) { // 部分累加

#pragma HLS pipeline

acc_part[j] += x[i + j];

}

for (int i = 1; i < 4; i++) { //最后累加

#pragma HLS unroll

acc_part[0] += acc_part[i];

}

return acc_part[0];

}

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