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mbence76
Explorer
Explorer
575 Views
Registered: ‎01-18-2019

bug: print value in testbench from hls::stream

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Dear Xilinx and Users,

I found a small bug in Vitis HLS  2020.2:

If the main() testbench is to print values from a stream coming from my_main(), then :

- If the last two values in the stream are the same then only 1 printf prints, the other does not.
- If either the values are different OR the printf's are different (e.g. one an extra space in the text) then it does print fine.
- If the two values are the same, and the two print lines are exactly the same, but there is some other instruction between the printing lines, then it prints fine too.

I used two identical lines:
printf("some text : %4x \n", (unsigned short)m2i.read());
printf("some text : %4x \n", (unsigned short)m2i.read());

However, the number of data taken out from the stream is OK.

So even the not printing line does take out the last value from the stream.

Miklos

1 Solution

Accepted Solutions
dsakjl
Explorer
Explorer
516 Views
Registered: ‎07-20-2018

Hi @mbence76 ,

I confirm you that the bug is in the console of Vitis HLS GUI, not in CLI execution.

Regards.

View solution in original post

5 Replies
dsakjl
Explorer
Explorer
560 Views
Registered: ‎07-20-2018

Hi @mbence76 ,

I tried your code in Vitis HLS 2020.2 but I wasn't able to trigger the bug.

Please, can you share your tb?

Regards.

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mbence76
Explorer
Explorer
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Registered: ‎01-18-2019

Hi @dsakjl ,  dut and tb attached.

Thank you very much for checking it out.

UPDATE: 

I simplified the code and replaced the attached files. 

Miklos

 

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dsakjl
Explorer
Explorer
540 Views
Registered: ‎07-20-2018

Hi @mbence76 ,

here what I got from C simulation:

"INFO: [COSIM 212-302] Starting C TB testing ...
text 3
text 3
text 3
The maximum depth reached by any of the 1 hls::stream() instances in the design is 0"

From Co-simulation:

"## quit
INFO: [Common 17-206] Exiting xsim at Wed Feb 10 14:43:33 2021...
INFO: [COSIM 212-316] Starting C post checking ...
text 3
text 3
text 3
The maximum depth reached by any of the 1 hls::stream() instances in the design is 0"

Can you share your build options?

Regards.

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mbence76
Explorer
Explorer
536 Views
Registered: ‎01-18-2019

Hi @dsakjl ,  

I am not sure how to extract the build options from the project.

They should be all default settings, however I made an archive zip of this demo project. I hope this helps.

I was looking at the Console window prints, not the _csim.log.   The latter seems to be OK.

Miklos

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dsakjl
Explorer
Explorer
517 Views
Registered: ‎07-20-2018

Hi @mbence76 ,

I confirm you that the bug is in the console of Vitis HLS GUI, not in CLI execution.

Regards.

View solution in original post