05-08-2019 06:04 PM
Does Vivado HLS supports mixed width dual port (different width ports A and B) BRAM synthesis?
If yes, then how?
If no, then I'd like to request that feature.
05-08-2019 07:09 PM
06-03-2019 11:17 AM
I am attaching a small design example for "mixed width BRAM" implementation.