Hi,
Totally agree with the points you made. I did not mean to imply that the pragma option was going away. This issue is only for the case when the stream is a class member variable. Further discussion with R&D resulted in the following modified design that allows you to get back to what you originally had:
Note that you need to inline the Stream constructor for the pragma to work correctly. So in summary, both forms of hls::stream will exist to allow backward compatibility. The only constraint is that Vitis HLS expects a constant for the depth option in the pragma and not an argument. An error will be emitted for this case.
#include <hls_stream.h>
template<typename T, int U=0>
class Stream;
template <typename T>
class Stream<T, 0> {
public:
Stream() {}
T Pop() {
#pragma HLS INLINE
return stream_.read();
}
void Push(T const &val) {
#pragma HLS INLINE
stream_.write(val);
}
protected:
hls::stream<T> stream_;
};
template<typename T, int U>
class Stream : public Stream<T, 0> {
public:
Stream() {
#pragma HLS inline
#pragma HLS STREAM variable=this->stream_ depth=U
}
};
void Read(int const *memory, Stream<int> &stream, int N) {
for (int i = 0; i < N; ++i) {
#pragma HLS PIPELINE II=1
stream.Push(memory[i]);
}
}
void Write(Stream<int> &stream, int *memory, int N) {
for (int i = 0; i < N; ++i) {
#pragma HLS PIPELINE II=1
memory[i] = stream.Pop();
}
}
void MyKernel(int const *source_memory, int *destination_memory, int N) {
#pragma HLS INTERFACE m_axi bundle=gmem0 port=source_memory
#pragma HLS INTERFACE m_axi port=destination_memory bundle=gmem1
#pragma HLS INTERFACE s_axilite port=source_memory bundle=control
#pragma HLS INTERFACE s_axilite port=destination_memory bundle=control
#pragma HLS INTERFACE s_axilite port=N bundle=control
Stream<int,512> stream;
Read(source_memory, stream, N);
Write(stream, destination_memory, N);
}
