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ahmedkhazal
Observer
Observer
2,582 Views
Registered: ‎07-08-2017

vivado HLS with floating points

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Dear friend

my question is :

I want to implement the neural network algorithms in FPGA .

is that possible to implement floating points numbers using VivadoHLS and SDK  in FPGA zynq7020? or I have to convert the floating points to integer numbers?

thanks

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hpoetzl
Voyager
Voyager
3,463 Views
Registered: ‎06-24-2013

Hey @ahmedkhazal,

 

It is possible to use floating point in FPGA and SDK, but it will be rather inefficient for your purpose.

Using fixed point or integer numbers instead will reduce the footprint per node and increase the performance.

 

Best,

Herbert

-------------- Yes, I do this for fun!

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hpoetzl
Voyager
Voyager
3,464 Views
Registered: ‎06-24-2013

Hey @ahmedkhazal,

 

It is possible to use floating point in FPGA and SDK, but it will be rather inefficient for your purpose.

Using fixed point or integer numbers instead will reduce the footprint per node and increase the performance.

 

Best,

Herbert

-------------- Yes, I do this for fun!

View solution in original post

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u4223374
Advisor
Advisor
2,559 Views
Registered: ‎04-26-2015

As @hpoetzl has said, integer or fixed-point will save a huge amount of space. I've even seen some interesting papers about binary neural networks (where the values are just 0 or 1), which is potentially extremely FPGA-friendly (because you can do a binary operation in a single LUT, whereas even integer or fixed-point will require DSP slices).

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ahmedkhazal
Observer
Observer
2,554 Views
Registered: ‎07-08-2017

thanks, friend , but the algorithm that I want to use is MLP that use a floating point, so is it supported by Vivado HLS?

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santhiya1702
Visitor
Visitor
2,062 Views
Registered: ‎02-19-2018

I am in the process of implementing 3 layer perceptron in vhdl. I used float32 for inputs. When adding 2 float32 numbers , the result is a float32 and the answer is correct. But when I multiply 2 float32 numbers, I am getting the resultant as float32 but with all zeros.

 

Could not find which datatype I have to use for implementing decimal in vhdl.

 

I went ahead and i implemented a feed forward network with real numbers and successfully did the simulation in Vivado 2017.4. But could not synthesize in Nexys-4 DDR board.

 

Regards,

Santhiya, Miami University, Ohio.

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u4223374
Advisor
Advisor
2,042 Views
Registered: ‎04-26-2015

@santhiya1702In VHDL, there aren't any suitable data types. HDLs (like VHDL and Verilog) don't do floating-point natively, because handling them is very challenging. In particular, almost all floating-point operations are multi-cycle processes, which makes them largely incompatible with the assumptions of HDLs (that basic operations can be done in one cycle and so the user can specify what happens on every cycle).

 

From here you have two options:

 

- The Xilinx floating-point IP core, which can do floating-point math for you (but it'll take several cycles at the bare minimum, and a lot of resources).

- Convert to HLS. HLS doesn't let the user decide what happens on each cycle, which allows it to do complex multi-cycle operations. In this case, it'll use the Xilinx floating-point IP core for the maths.

- Convert to fixed-point. This will be challenging, but it'll give you a much more efficient (in both speed and resources) design than floating-point.

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