We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Registered: ‎02-05-2019

Aurora Example Design debug issue

Hi all, 

I am trying to debug the Aurara example design and I keep getting this message when I try to run the trigger on the iLA core

[Labtools 27-1395] Unable to arm ILA 'hw_ila_1'. The core clock is slow or no core clock connected for this ILA or the ILA core may not meet timing.

I can't find a working solution on the forum, can anyone help?

0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
Registered: ‎02-27-2019

回复: Aurora Example Design debug issue

Hi @hmustafachico ,

Could you check the ila clock is active?  You can set the clock as ouput and check it by oscilloscope.

Don't forget to reply, kudo, and accept as solution.
0 Kudos