01-30-2021 07:51 AM
Fist off, I must apologize for this rudimentary question. I write a simple 16-bit up-down counter which counts up to 62500 and then down to zero and generate a zero_tk at zero. Indeed it's triangle wave for my space vector pwm and whole svpmw project is OK when I work with the arty-a7-35t 100MHz clock. But when adding "Clocking Wizard" to generate 300MHz, I receive "Timing 32-282" critical warning even when the whole project is nothing but this simple counter.
My project in Vivado 2020.1 includes 3 modules: 1) triangle_wave 2) clk_gen_wrapper 3) top.
I appreciate any answer to learn what I don' know. Thanks
01-30-2021 08:11 AM
300 MHz is pretty fast for an Artix, but I would think a simple 16 bit counter would work. I suggest putting the count up, count down section into the clocked process.
01-30-2021 10:57 AM
"Timing 32-282" related to clock or output ?
Share the complete warning.
01-30-2021 11:15 PM
The point is I want to make my whole space vector modulation project work with 300MHz but according to your comment it doesn't seem feasible with Artix. Let me add that after implementation the result is correct so I can see the zero_tk with 2.400KHz on oscilloscope despite critical warning, but space vector modulation doesn't work well. At 200MHz I still receive this critical warning but the space vector modulation project work well after implementation in hardware. Thanks for your suggestion.
01-31-2021 03:16 AM
Embedding combinational logic inside the process obliterate the critical warning, but is there any constraint trick to implement previous explicit code without critical warning? By the way thanks for your suggestion.