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carljsenecal
Visitor
Visitor
5,183 Views
Registered: ‎12-07-2016

FATAL_ERROR:1::78:1.3 - Physical Synthesis Failed

I am getting the error:

 

Running physical synthesis...
FATAL_ERROR:1::78:1.3 - Physical Synthesis Failed. For technical support on
this issue, please visit http://www.xilinx.com/support.

Process "Map" failed

 

with no further information during the implemetation of a design.  I tried all of the suggestions found here: https://www.xilinx.com/support/answers/42981.html but nothing helped.  

 

What could be causing this error?

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17 Replies
austin
Scholar
Scholar
5,168 Views
Registered: ‎02-27-2008

c,

 

Look at the log file.  Examine what happens before it quits.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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syedz
Moderator
Moderator
5,138 Views
Registered: ‎01-16-2013

@carljsenecal,


Check the following Answer Record:

https://www.xilinx.com/support/answers/42981.html

 

Make sure you are using supported OS version with the ISE.  

https://www.xilinx.com/support/answers/18419.html

 

--Syed

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vemulad
Xilinx Employee
Xilinx Employee
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Registered: ‎09-20-2012

Hi @carljsenecal

 

Try disabling -logic_opt and -register_duplication in MAP settings and see if it helps to overcome the error.

Thanks,
Deepika.
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carljsenecal
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Registered: ‎12-07-2016

I am unable to remove the -logic_opt Combinational Logic Optimization option.  I have tried changing the Design Goal to Balanced and Strategy to Xilinx Default (unlocked) but this does not unlock that option.  Checking the "unlock" box for other Design Goals/Strategies also fails to unlock this option.

 

Disabling register duplication does not overcome this error.

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carljsenecal
Visitor
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5,108 Views
Registered: ‎12-07-2016

What log file are you referring to? I have posted the message that shows before the error in the console window and everything that comes after.
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carljsenecal
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Registered: ‎12-07-2016

Also, how do I edit or delete a post on this forum?  There is no option in the drop down menu.Screen Shot 2016-12-08 at 11.12.45 AM.png

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vemulad
Xilinx Employee
Xilinx Employee
5,001 Views
Registered: ‎09-20-2012

Hi @carljsenecal

 

Can you upload the captures showing MAP process properties and "design goals and strategies"?

Thanks,
Deepika.
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carljsenecal
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Registered: ‎12-07-2016

@vemulad

 

Screen Shot 2016-12-12 at 9.47.53 AM.png

 

Screen Shot 2016-12-12 at 9.48.18 AM.png

 

Screen Shot 2016-12-12 at 9.56.02 AM.png

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carljsenecal
Visitor
Visitor
4,944 Views
Registered: ‎12-07-2016

Still looking for a solution

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keisn13
Observer
Observer
4,793 Views
Registered: ‎10-28-2013

Do not use design strategy. set it by default. If it will be complete, try set some settings of optimisation, but before try run without any optimization.
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carljsenecal
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Registered: ‎12-07-2016

 

@keisn13 wrote:
Do not use design strategy. set it by default. If it will be complete, try set some settings of optimisation, but before try run without any optimization.

@keisn13 Look at my screenshots; isn't that what I'm already doing?  I have the strategy set to Xilinx Default.

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keisn13
Observer
Observer
4,768 Views
Registered: ‎10-28-2013

Soory i wrote not correct. I mean that you need off all optimizations and run again.
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carljsenecal
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4,762 Views
Registered: ‎12-07-2016

The option to remove optimization is greyed out even though I am using the "unlocked" strategy.  Choosing another strategy and along with the "unlock" option also fails to enable the deselection of optimization.  How do I go about deselecting optimization when it appears that I do not have that option?  Is there somewhere else other than what I've shown in the screenshots where I can remove optimization?

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carljsenecal
Visitor
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Registered: ‎12-07-2016

Still experiencing this issue

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carljsenecal
Visitor
Visitor
4,669 Views
Registered: ‎12-07-2016

@vemulad Did the screenshots you requested provide any additional information?

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carljsenecal
Visitor
Visitor
4,622 Views
Registered: ‎12-07-2016

Any ideas on why those options still show up as locked when I am in the "unlocked" setting?  Still having these problems

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carljsenecal
Visitor
Visitor
4,444 Views
Registered: ‎12-07-2016

Still having this problem if anyone has ideas...

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