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Newbie
Newbie
7,823 Views
Registered: ‎08-26-2013

How can i use inverting clk in SLICE?

clk.PNG

 

 

In this picture, i want to know to use CLK_B instead  CLK.

 

 

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7 Replies
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Scholar
Scholar
7,819 Views
Registered: ‎07-01-2008

You will need to add the inversion to the source. 

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Historian
Historian
7,797 Views
Registered: ‎02-25-2008


@knohen wrote:

 

In this picture, i want to know to use CLK_B instead  CLK.

 


myFlop : process (CLK) is

begin

    if falling_edge(CLK) then

        q <= d;

    end if;

end process myFlop;

 

----------------------------Yes, I do this for a living.
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Observer
Observer
7,777 Views
Registered: ‎08-01-2012

Hi ,

 

You can use the primitives in the FPGA to invert a clock that is much stable .

 

With regards

Vintu

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Historian
Historian
7,763 Views
Registered: ‎02-25-2008


@vjose wrote:

Hi ,

You can use the primitives in the FPGA to invert a clock that is much stable .

 


Why would you want to do that when the code snippet I provided does exactly that, without the unnecessary instantiation of primitives?

----------------------------Yes, I do this for a living.
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Observer
Observer
7,741 Views
Registered: ‎04-24-2008

Use FPGA editor change it, I guess you want do a ECO on a exist nice file.
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Observer
Observer
7,740 Views
Registered: ‎04-24-2008

Just click on the arrow down button, then you can direct click on the invert path triangle to change the path.
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Historian
Historian
7,730 Views
Registered: ‎02-25-2008


@zhoushihua wrote:
Use FPGA editor change it, I guess you want do a ECO on a exist nice file.

That's very dangerous. Then the source doesn't match what gets loaded into the FPGA, and the next guy who has to deal with this will wonder what the hell is going on. 

----------------------------Yes, I do this for a living.
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